{"title":"Implementation and comparison of a new MOC with post regulators","authors":"T. Deepti, K. Deepa, S. Chandran","doi":"10.1109/IICPE.2012.6450507","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450507","url":null,"abstract":"A comparative study of two different types of post regulators is carried out in this paper. First one is low drop out post regulator (LDO) and second one is DC-DC step down LTM 4601 HV post regulator. These post regulators regulate the auxiliary high power output of the multi-output flyback dc-dc converter, designed for providing supply for the telemetry tracking transmitter subsystem of the satellite. The requirements for space applications are taken into consideration while designing.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"191 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123323974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New control methods for matrix converter based UPFC under unbalanced load","authors":"F. Shahir, E. Babaei, S. Ranjbar, S. Torabzad","doi":"10.1109/IICPE.2012.6450390","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450390","url":null,"abstract":"Recent development of power electronics introduces the use of flexible ac transmission systems (FACTS) controllers in power systems. These devices are helping to performance of power system especially when power system supports unbalanced loads. One of the most important of FACTS devices is unified power flow controller based on matrix converter (UPFC-MC) which space vector modulation (SVM) technique is used to control its nine-bidirectional switches. This paper presents two control methods for UPFC-MC under unbalanced power system. These control methods are suggested to improve transmission lines power flows. The validity of the proposed control methods are reconfirmed by simulation results.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121451361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sliding mode control of dual-buck full-bridge inverter","authors":"S. Gudey, R. Gupta","doi":"10.1109/IICPE.2012.6450467","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450467","url":null,"abstract":"In a conventional bridge-type inverter, shoot-through problem is a major constraint to the reliability of the inverter. Recently introduced dual-buck full bridge inverter (DBFBI) eliminates the problems of shoot-through. In this paper output voltage of the DBFBI is controlled using the sliding mode control (SMC). It has been shown that use of hysteresis current control along with SMC well operates in quasi-sliding mode. It has been shown that the system has sufficient stability margin to track the reference voltage and has robustness properties against perturbations. Operating principle and design aspects are presented in detail for the inverter. Control performance of the proposed DBFBI is verified through the simulation studies with 1 kVA inverter on PSCAD/EMTDC programming platform.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116561991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Shunt active power filter as front end converter for DC loads","authors":"S. Garlapati, R. Gupta","doi":"10.1109/IICPE.2012.6450515","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450515","url":null,"abstract":"A shunt active power filter is used to draw reactive and harmonic components of the load power and allow only real component of the load power to be drawn from the source. Whereas a front end converter is used to control the active power flow exchange between the grid and the load. This paper presents a new approach for the shunt active power filter where it also acts as a front end converter. Firstly, it feed active power to the DC loads through the DC link and secondly, it serve as a reactive and harmonic power source for the AC load which is supplied real power from the main grid. A generalized p-q theory is applied for controlling the unified shunt active power filter and front end converter without any addition of extra components. The DC link voltage of the converter is controlled by comparing it with a reference value. Operating principle and working performance for different load perturbations are presented in detail for the converter. Control performance of the proposed shunt active power filter as front end converter is verified through the simulation studies on PSCAD/EMTDC programming platform.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122404350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evolutionary algorithm based combinational circuit design","authors":"A. Rudra, N. Pandey, S. Indu","doi":"10.1109/IICPE.2012.6450479","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450479","url":null,"abstract":"The hardware that allows autonomous reconfiguration to learn and adapt autonomously from the environment is called Evolvable hardware; employs evolutionary algorithms on PLDs so that the configuration may be changed without human intervention. The systems employed in dynamic operating conditions must be able to adapt to situation e.g. performance of the space system may vary due to sudden high radiation and self adaptation is needed to restore the performance as soon as possible. This paper, suggests a design method to evolve a Genetic algorithm (GA) based combinational logic circuit. The method is verified by designing an even parity generator circuit.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131495231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel multifunction modified CFOA based inverse filter","authors":"K. Garg, R. Bhagat, B. Jaint","doi":"10.1109/IICPE.2012.6450471","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450471","url":null,"abstract":"Inverse filter has been a topic of great interest and research. A novel multifunction inverse bi-quad configuration based on modified current feedback operational amplifiers (MCFOAs) and a minimum number of grounded passive elements are presented in this paper. To show the flexibility of the proposed MCFOA inverse Lowpass, inverse Bandpass and inverse Highpass filter functions employing MCFOA are reported. All the passive elements in the proposed scheme are grounded to benefit easier electronic tunability. The layout of the proposed MCFOA is also given. The workability of the proposed inverse filters is demonstrated by PSPICE simulations.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130334390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparison of vector-based hysteresis current control schemes for three-phase three wire shunt active power filter","authors":"R. Patel, J. Patel, P. J. Patel","doi":"10.1109/IICPE.2012.6450417","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450417","url":null,"abstract":"Three space vector (SV) current control schemes for shunt active power filters (SAPF) is introduced in this paper, with a standard two-level VSI. Out of three control schemes, each is compared with the other scheme to evaluate inherent advantages and disadvantages of the control schemes. Name of these three vector base current control schemes are vector base HCC method-I, vector base HCC method-II and vector base HCC method-III. In this paper, harmonic current components as a reference signal is generated by using a real-time fast Fourier transform. Further on base of error signal position, vector base hysteresis current controllers choose switching states from the switching table implemented in a DLL (dynamic link library) block of PSIM software. With the vector base HCC method-III, the total harmonic distortion (THD) of the compensated grid current is significantly reduced. Different Vector base HCC schemes are compared via simulation results based on two-level VSI using PSIM software.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131725744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"GA based multiobjective economic load dispatch by Maximization Of Minimum Relative Attainments","authors":"N. Jain, U. Nangia, J. Jain","doi":"10.1109/IICPE.2012.6450460","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450460","url":null,"abstract":"In this paper, two important objectives of power systems - cost of generation and system transmission losses have been considered. The multiobjective economic load dispatch (MELD) problem is formulated using constraint method. Genetic Algorithm has been used to generate the noninferior set for IEEE 5, 14 and 30 bus systems in 2D space. Target Point (TP) or the best compromise solution has been achieved by Maximization of Minimum Relative Attainments method. This method assumes that all the objectives are being minimized and seeks the solution which maximizes the minimum relative attainment by any objective of its ideal reference value relative to its worst feasible value. The TP obtained by this method has been compared with that obtained by Ideal Distance Minimization method and Surrogate Worth Tradeoff technique. It is observed that the proposed method gives encouraging results for IEEE 5 and 14 bus systems whereas Ideal Distance Minimization method is the best for IEEE 30 bus system.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132332419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel switching scheme for Three phase PWM AC Chopper fed induction motor","authors":"J. Thankachan, S. George","doi":"10.1109/IICPE.2012.6450463","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450463","url":null,"abstract":"AC Voltage Controllers are finding important application in speed control of induction motors, light dimmers, heat controllers and soft starters. AC Chopper is an arrangement of bi-directional switches to control the output voltage by varying the duty-cycle of operation of the switches involved. In this paper, a new switching scheme for three phase ac chopper is discussed which requires only three variables for converting the fixed input ac voltage to a controlled ac voltage. The added advantage is that this scheme takes into account the safe operation of the ac chopper by preventing short-circuit conditions. At the same time it provides a path to the motor current when the terminal voltage falls to zero. Implementation of the proposed scheme leads to much simpler control circuitry than discussed in the literature. A Three phase 3HP induction motor-fed from three phase ac chopper is used for the work. The simulation results confirm the improvement in power factor, leading to power savings.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116405247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and implementation of robust Multirate Output feedback based Sliding Mode Controller for Induction Motors using FPGA","authors":"V. Tuteja, J. Patel, A. Mehta","doi":"10.1109/IICPE.2012.6450365","DOIUrl":"https://doi.org/10.1109/IICPE.2012.6450365","url":null,"abstract":"This paper demonstrates design of Multirate Output feedback(MROF) based Discrete-time Sliding Mode Controller(DSMC) for sensorless control of Induction Motor(IM) implemented using System Generator (SysGen). A multirate output technique is used to estimate the state variables of Induction Motor. For designing the observer and controller, a linearised model is used. The efficacy of the scheme is shown in the simulation result.","PeriodicalId":220613,"journal":{"name":"2012 IEEE 5th India International Conference on Power Electronics (IICPE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121933246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}