Song Yang, Liu Wei-ming, Wu Xiao-Dan, Wang Yu, Chen Xiao-lu, Zheng Ting-ting, Ren Zheng
{"title":"Online Measurement Method for Parameters of Transmission Line Based on PMU","authors":"Song Yang, Liu Wei-ming, Wu Xiao-Dan, Wang Yu, Chen Xiao-lu, Zheng Ting-ting, Ren Zheng","doi":"10.1109/ICAM.2018.8596471","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596471","url":null,"abstract":"The traditional off-line measurement method for parameters of transmission line must deploy the equipment and personnel at both of the line. The earth loop has effect on the measurement result, especially the winter soil is frozen. To this end, the measurement method based on PMU is proposed. Using the synchronized phasor measurement, the method can eliminate the effects of the earth loop and measure online. In this paper, the effectiveness of the method is verified by the simulation example and actual measurement data. The sample precision of all the measured electric quantities are determined by sensitivity analysis. The results show that the existing PMU can meet the engineering accuracy requirements.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129919689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chang-lin Chen, Qingjiang Li, Nan Li, Haijun Liu, Yingqiang Dai
{"title":"Link-Sharing: Regional Congestion Aware Routing in 2D NoC by Propagating Congestion Information on Idle Links","authors":"Chang-lin Chen, Qingjiang Li, Nan Li, Haijun Liu, Yingqiang Dai","doi":"10.1109/ICAM.2018.8596400","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596400","url":null,"abstract":"Congestion aware routing plays an important role in balancing the Networks-on-Chip (NoC) traffic load to diminish the communication cost. Theoretically, the more detailed network congestion information is collected, the better routing decision can be made. However, the congestion information propagation methods employed by state of the art designs usually have drawbacks like long update interval, nonnegligible link wiring overhead, or can only propagate abbreviated congestion information. Noticing that NoC link utilization rate is typically low, we propose a Link-Sharing method which propagates congestion information on the normal data links during their idle cycles. Be benefited from the wide link bandwidth, Link-Sharing enables each router to have a more detailed and timely updated network status overview than counterpart congestion aware routing algorithms, and thus can make more sophisticated routing decision to avoid the congested area. When compared with the counterpart methods, Link-Sharing is able to improve the NoC saturation point by up to 20.8 % with negligible area and power overhead.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122233140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hao Zhang, Xu Yan, Jiahui Shi, Tao Lu, Jiaqi Yang, F. Lin
{"title":"A 0.5-5.6 GHz Inductorless Wideband LNA with Local Active Feedback","authors":"Hao Zhang, Xu Yan, Jiahui Shi, Tao Lu, Jiaqi Yang, F. Lin","doi":"10.1109/ICAM.2018.8596368","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596368","url":null,"abstract":"In this paper, a wideband low noise amplifier (LNA) with local active feedback is proposed. The proposed LNA exploits a differential common-source stage with current-reuse technique to reduce the power consumption. A source follower is utilized as an active feedback path and the feedback signal is taken preceding the cascode transistor to broaden the bandwidth and improve the linearity. Implemented in a 130-nm SOI CMOS technology, the proposed LNA achieves simulated 21.1 dB voltage gain with a 3-dB bandwidth of 0.5-5.6 GHz without using any inductors. The minimum NF is 3.63 dB while the maximum IIP3 is −4.86 dBm. The power consumption is 15.2 mW under a supply voltage of 1.5 V.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127436503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Taotao Qian, Lei Chen, Xuewu Li, Huabo Sun, Jie Ni
{"title":"A 1.25Gbps Programmable FPGA I/O Buffer with Multi-Standard Support","authors":"Taotao Qian, Lei Chen, Xuewu Li, Huabo Sun, Jie Ni","doi":"10.1109/ICAM.2018.8596436","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596436","url":null,"abstract":"In this paper, a field programmable gate array (FPGA) I/O buffer developed to support 1.25 gigabits-per-second differential source-synchronous standards is presented. The I/O buffer provides the compatibility of 38 high-speed I/O standards, features wide supply voltage range, programmable drive strength and controlled impedance driver. To enhance the performance and drive capacity of low voltage standards, an auxiliary supply is introduced into the I/O buffer. The proposed I/O buffer has been fabricated and integrated in an SRAM-based FPGA with commercial 65nm CMOS technology.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"31 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125701616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Research on Improved Virtual Synchronous Generator Based on Differential Compensation Link","authors":"Yicheng Zhu, Min-fang Peng, Xiang Yu","doi":"10.1109/ICAM.2018.8596677","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596677","url":null,"abstract":"Aiming at the contradiction between the dynamic and steady-state characteristics of conventional output power control for virtual synchronous generator (VSG) based on first-order link virtual inertia, a VSG control strategy based on differential compensation and bandpass damping power feedback is proposed. The control strategy adds a differential compensation link and a band-pass damping power feedback link to the forward channel of the conventional VSG control structure, thereby ensuring the steady-state control accuracy of the output power, accelerating the dynamic power response speed, increasing the system damping, and effectively reducing The energy impact of the dynamic process of the energy storage unit. The simulation verified the effectiveness of the proposed scheme.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131035293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Waseem Aslam, Yonghai Xu, A. Siddique, Amir Nawaz, M. Rasheed
{"title":"Electrical Power System Stability Enhancement by Using an Optimal Fuzzy PID Controller for TCSC with Dual TCRs","authors":"Waseem Aslam, Yonghai Xu, A. Siddique, Amir Nawaz, M. Rasheed","doi":"10.1109/ICAM.2018.8596489","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596489","url":null,"abstract":"In recent years, there has been an incredible increase in power demand but power generation and transmission expansion is insufficient because of environmental restrictions and limited resources. Therefore, it has led to transmission systems to be operated nearer to their stability and thermal limits which may further encounter additional problems with interconnections or weak ac links while retaining the emphasis on quality of power to be delivered. In order to desire the security requirement, stability, controllability and maximum system loadability, Thyristor based (FACTS) controller, thyristor Controlled Series Capacitor (TCSC) is equipped in a transmission line. In this paper, an optimal fuzzy PID controller is designed for TCSC with dual TCRs. The controller of a TCSC is designed on the basis of system impedance. An optimal fuzzy PID controller is obtained through using fuzzy logic (FL) and genetic algorithm (GA). To investigate the achievements of optimal fuzzy PID controller, simulation has been conducted in MATLAB/Simulink software. The accuracy of the designed controller well checked on three machine-nine bus system. The simulations results showed that the optimal fuzzy PID controller can generate an improved dynamic response.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133801973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Haitao, R. Tao, C. Junyi, Zhao Yun, Cao Junjie, He Jiachao, Zhou Guofa, Min Bo
{"title":"Usage and Application of Power Quality Monitor on Harmonic Measurement","authors":"Y. Haitao, R. Tao, C. Junyi, Zhao Yun, Cao Junjie, He Jiachao, Zhou Guofa, Min Bo","doi":"10.1109/ICAM.2018.8596427","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596427","url":null,"abstract":"With the large number of PV access in the medium and low voltage distribution network, the power quality problem of distribution network is becoming increasingly prominent. Therefore, it is necessary to test the power quality of distribution network with PV access and observe its power quality periodically. Based on this, this paper introduces the current commonly used power quality analyzer, and mainly describes the application steps and points for attention of HIOKIPW3198 power quality analyzer. Finally, this paper takes Shanghai Xinsheng semiconductor photovoltaic power generation system for an example, using HIOKIPW3198 power quality analyzer to test power quality on its workshop and 1# transformer low voltage side. Through the test and analysis, it is found that the voltage imbalance and frequency deviation of the company are within the allowable range, but there are slight voltage harmonic problems and serious current harmonic problems. The suggestion is that some measures should be taken to solve the problem. Otherwise, the power supply safety and quality of the company will be affected.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133757843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hongyi Wang, Jingcheng Wang, Jianbin Su, Guohe Zhang, F. Liang
{"title":"A Precision Voltage Reference Circuit with Trimming for 16-Bit SAR ADC in 55nm CMOS Technology","authors":"Hongyi Wang, Jingcheng Wang, Jianbin Su, Guohe Zhang, F. Liang","doi":"10.1109/ICAM.2018.8596484","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596484","url":null,"abstract":"A low temperature coefficient voltage reference circuit for a 16-bit successive-approximation-register analog-digital-converter (SAR ADC) is presented in this paper. Including high-order compensation technique, logarithmic compensation technique and power supply rejection ratio (PSRR) enhancement technique are applied to this design. In addition, in order to pursue better temperature coefficient and output voltage accuracy, three kinds of trimming methods have applied to this design. This proposed design was implemented in a standard 55 nm CMOS process, the simulation results have shown temperature coefficient(TC) as low as 3.3 ppm/°C over a temperature range of 165°C (- 40°C to 125°C), the line regulation at room temperature is only 3.5 ppm/V, the circuit performs a PSRR property of 120dB@lkHz.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131384979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Lai, Sheng Lyang Jang, Yung-Han Chang, M. Juang
{"title":"Locking Range Property of Single-phase Injected Divide-by-3 Injection-Locked Frequency Divider at High-Injection Power","authors":"W. Lai, Sheng Lyang Jang, Yung-Han Chang, M. Juang","doi":"10.1109/ICAM.2018.8596644","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596644","url":null,"abstract":"This letter studies a wide-locking range divide-by-3 CMOS LC-tank injection locked frequency divider (ILFD) subjected to high injection power larger than 0 dBm and describes the operation principle of the ILFD. The ILFD circuit is realized with a double cross-coupled CMOS LC-tank oscillator with one injection MOS. The self-oscillating VCO is injection-locked by third-harmonic input to obtain the division factor of three. Measurement and simulation shows the locking range saturates at high injection power and then starts decreasing as injection power further increases.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114526844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yuuta Satomi, K. Hachiya, T. Kanamoto, A. Kurokawa
{"title":"Optimization of Full-Chip Power Distribution Networks in 3D ICs","authors":"Yuuta Satomi, K. Hachiya, T. Kanamoto, A. Kurokawa","doi":"10.1109/ICAM.2018.8596650","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596650","url":null,"abstract":"In this paper, we propose a method to minimize resources of power distribution networks (PDNs) in a three-dimensional integrated circuit (3D IC) under the given design constraints. We first present modeling of PDNs with RC reduction. Next, we describe the optimization of PDN parameters using a multi-objective optimization algorithm. The decoupling capacitors, on-chip power/ground grids, and power/ground through-silicon vias (TSVs), which have a great influence on the voltage drop (IR drop) and on the chip area increase, are optimized. The experimental results demonstrate that the new proposed method is effective for designing PDNs in 3D ICs.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114549288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}