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2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)最新文献

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Distributed Generations Planning in Network Based on Marginal Benefit 基于边际效益的网络分布式代规划
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596582
Xiang Yu, Min-fang Peng, Yicheng Zhu
{"title":"Distributed Generations Planning in Network Based on Marginal Benefit","authors":"Xiang Yu, Min-fang Peng, Yicheng Zhu","doi":"10.1109/ICAM.2018.8596582","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596582","url":null,"abstract":"With the emphasis on environmental protection and the development of power systems, distributed generation (DG) has developed rapidly. Intelligent search algorithms such as genetic algorithms are widely used in DGs network access optimization planning. In order to avoid problems such as precocity, non-convergence of iteration, and unreasonable optimization of parameter settings in intelligent search algorithms such as genetic algorithms, marginal benefits are introduced. Basing on this concept, proposes a new DGs network entry planning method. This method does not need to set optimization parameters and iterates. The calculation is simple and the result is stable. Taking the network loss and the minimum voltage of the node as the optimization goal, the IEEE 33-node standard system is simulated and compared. The experimental results prove the effectiveness and practicability of the proposed method.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116580854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of a Multiple Channel Capacitance Measurement Integrated Circuit for Electronic Skin Application 用于电子皮肤的多通道电容测量集成电路的设计
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596551
Rui Wang, Xiaohong Peng, Nan Jiang, Wensi Wang
{"title":"Design of a Multiple Channel Capacitance Measurement Integrated Circuit for Electronic Skin Application","authors":"Rui Wang, Xiaohong Peng, Nan Jiang, Wensi Wang","doi":"10.1109/ICAM.2018.8596551","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596551","url":null,"abstract":"Capacitance measure is a technique for applications such as capacitance tomography and capacitive sensor readout. This paper presents a multiple channel capacitance measurement IC which is based on a switched-capacitor design in 0.18um process. It can be used on electronic-skin or other array-type sensors system. It contains of capacitance voltage conversion units and a single-slope ADC. It uses multiple channels at the same time to compensate the disadvantage on speed. Test result shows that the dynamic range can reach 45.1dB, and the conversion rate is about 5us/row in this paper.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122603678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Accuracy Analysis of Node Activation Function Based on Hardware Implementation of Artificial Neural Network 基于人工神经网络硬件实现的节点激活函数精度分析
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596633
Nan Jiang, L. Hou, Jia Guo, Xinyi Zhang, Ang Lv
{"title":"Accuracy Analysis of Node Activation Function Based on Hardware Implementation of Artificial Neural Network","authors":"Nan Jiang, L. Hou, Jia Guo, Xinyi Zhang, Ang Lv","doi":"10.1109/ICAM.2018.8596633","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596633","url":null,"abstract":"One of the difficulties encountered in realizing artificial neural network based on VLSI is the choice of the implementation method of activation function. At present, the main approaches to solve this problem are piecewise nonlinear approximation and bit level mapping. Based on hyperbolic tangent, the final output error of the two methods is discussed through the hardware implementation and software analysis of the artificial neural network nodes. We found that the nonlinear approximation method has the problem of large output fluctuation, and the amplification effect of the backpropagation can not be ignored. Therefore, this paper proposes that the bit level mapping method has more advantages in practical applications in the implementation of high-precision artificial neural nodes.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122987638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of Super Capacitor Charging Management Integrated Circuit for Energy Harvesting Based on Reconfigurable Photovoltaic Cells Array 基于可重构光伏电池阵列的能量收集超级电容器充电管理集成电路设计
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596597
Lu Jin, Wensi Wang, Jiaqi Yu, Zhijie Chen
{"title":"Design of Super Capacitor Charging Management Integrated Circuit for Energy Harvesting Based on Reconfigurable Photovoltaic Cells Array","authors":"Lu Jin, Wensi Wang, Jiaqi Yu, Zhijie Chen","doi":"10.1109/ICAM.2018.8596597","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596597","url":null,"abstract":"In this paper, a super capacitor charging management integrated circuit (IC) based on reconfigurable photovoltaic cells array is proposed. This IC is based on a novel maximum power point tracking (MPPT) method that arranges photovoltaic (PV) cells into different combination networks in order to optimize the charging efficiency dynamically. With the reconfigurable PV array, various voltage outputs of PV cells charge the super capacitor without inductor based switching regulator. The MPPT circuit is designed according to the I-V characteristics and P-V characteristics of the PV cells. Depending on the charging stage of the super capacitor, different series/parallel combination networks of the PV cells are selected to make the PV cells work in the vicinity of the maximum output power to achieve a higher charging efficiency. Charging current of a single PV ranges from 10μA to 100μA, the charging efficiency from a small PV cells array to IF-5V super capacitor can reach more than 80%, up to 94%.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"152 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117077592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Power Management IC Design for Microwatts Vibration Piezoelectric Energy Harvesting Based on Parallel-SSHI 基于并联sshi的微瓦振动压电能量采集电源管理集成电路设计
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596592
Jiaqi Yu, Wensi Wang, Lu Jin, Xu Liu
{"title":"Power Management IC Design for Microwatts Vibration Piezoelectric Energy Harvesting Based on Parallel-SSHI","authors":"Jiaqi Yu, Wensi Wang, Lu Jin, Xu Liu","doi":"10.1109/ICAM.2018.8596592","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596592","url":null,"abstract":"Vibration energy harvesting is an emerging technology for future self-powering devices. This paper presents an autonomous piezoelectric energy harvesting power management system. It is based on Parallel-SSHI (synchronized switch harvesting on inductor) technique in a $mathbf{0.18}-mumathbf{m}$ CMOS process. Comparing with the low efficiency of passive rectifier, the peak efficiency can reach 83% with the design of charge transfer logic circuit in this paper. Through internal high-precision currentreference, external load can be changed to support the needs of different systems. This design can provide an input power in the range from a few to several hundreds of microwatts, and the output voltage can reach 4.5V.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"73 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126018171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Metal-Semiconductor-Metal (MSM) Varactor Based on AlGaN/GaN Heterostructure with Cutoff Frequency of 914.5GHz for Terahertz Frequency Multiplication 基于AlGaN/GaN异质结构的金属-半导体-金属(MSM)变容管，截止频率为914.5GHz，用于太赫兹倍频
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596573
Qian Li, Ning An, Yang Tang, Jun Jiang, Li Li, Jianping Zeng, W. Tan
{"title":"Metal-Semiconductor-Metal (MSM) Varactor Based on AlGaN/GaN Heterostructure with Cutoff Frequency of 914.5GHz for Terahertz Frequency Multiplication","authors":"Qian Li, Ning An, Yang Tang, Jun Jiang, Li Li, Jianping Zeng, W. Tan","doi":"10.1109/ICAM.2018.8596573","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596573","url":null,"abstract":"The design, fabrication and characteristics of planar metal-semiconductor-metal (MSM) two-dimensional electron gas (2DEG) varactors based on AlGaN/GaN high electron mobility transistor (HEMT) for terahertz multiplication are presented. The gate length of ~450nm and the gate distance of $1mu text{m}$ are processed by using electron beam lithography (EBL). The DC characteristic shows a very low current leakage of ~7.3 $times 10^{-11}quad mathbf{A}/mathbf{mm}$, which is advantageous to the power consumption of terahertz multiplier. S-parameters are measured to obtain the high-frequency performance. The series resistance $(mathbf{R})mathbf{of}sim 41.26 Omega$, and the capacitance $(text{C}_{0})$ of ~4.22fF are abstracted respectively by matching the equivalent circuit at zero bias voltage. The cutoff frequency is of $sim 914.5$ GHz. The capacitance switching ration $(mathbf{C}_{max}/mathbf{C}_{min})$ is $geqslant 2.4$, and the figure of merit (FOM) is above 2.2 THz","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130691827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Heterogeneous Routing: A Methodology for PPA Tradeoff in Network-On-Chips 异构路由:片上网络中PPA权衡的方法
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596603
Chenfeng Li, Xuexiang Wang, Lei Cai, Zihan Gu
{"title":"Heterogeneous Routing: A Methodology for PPA Tradeoff in Network-On-Chips","authors":"Chenfeng Li, Xuexiang Wang, Lei Cai, Zihan Gu","doi":"10.1109/ICAM.2018.8596603","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596603","url":null,"abstract":"This paper proposes a routing algorithm design methodology based on real network traffic analysis. The method aims at large-scaled network on chip in which load differs among different areas or routing nodes. By applying different routing algorithms on different nodes, the area and/or power consumption can be saved only at the cost of minor performance loss. Experimental results show that by replacing routing nodes using NoP routing algorithm with nodes using XY routing algorithm, up to 10% of routing nodes can be simplified into much less power/area costing nodes, saving at least 2 % of area overhead, only at the cost of 5% of performance loss.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128831287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Wide Tuning Range Low $pmb{K}_{mathbf{VCO}}$ and Low Phase Noise VCO 宽调谐范围低$pmb{K}_{mathbf{VCO}}$和低相位噪声VCO
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596639
Shu Xu, Wanrong Zhang, Pei Shen, Hongyun Xie, D. Jin, Yin Zhang, Xin Yang, Zhao Zhang
{"title":"A Wide Tuning Range Low $pmb{K}_{mathbf{VCO}}$ and Low Phase Noise VCO","authors":"Shu Xu, Wanrong Zhang, Pei Shen, Hongyun Xie, D. Jin, Yin Zhang, Xin Yang, Zhao Zhang","doi":"10.1109/ICAM.2018.8596639","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596639","url":null,"abstract":"A wide tuning range, low $pmb{K}_{mathbf{VCO}}$ and low phase noise VCO is presented in this paper by combining fully differential active inductor (DAI), switched capacitor array and MOS-based variable capacitors. The adoption of the DAI instead of spiral inductor in the LC tank reduces the phase noise of VCO due to high $pmb{Q}$ value of DAI. The multiple tuning modes by tunable active inductor, switched capacitor array and variable capacitor make VCO have a wide tuning range of oscillation frequency and lower $pmb{K}_{mathbf{VCO}}$. Based on TSMC $mathbf{0.18}mumathbf{m}$ CMOS process, the VCO is verified by Advanced Design System (ADS). The results show that the oscillation frequency can be tuned from 988MHz to 4601MHz with a wide tuning bandwidth of 129.3%, and the lowest phase noise is −116.88dBc/Hz at 1MHz offset, and the $pmb{K}_{mathbf{VCO}}$ is as low as 45-550MHz/V.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133835321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Failure Analysis on the Abnormal Leakage of the Transistors at Lower Temperatures 低温下晶体管异常漏电的失效分析
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596676
Jiajia Sun, Xu Wang, Meng Meng, Ruoyuan Qu
{"title":"Failure Analysis on the Abnormal Leakage of the Transistors at Lower Temperatures","authors":"Jiajia Sun, Xu Wang, Meng Meng, Ruoyuan Qu","doi":"10.1109/ICAM.2018.8596676","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596676","url":null,"abstract":"Failure location and mechanism analysis of a type of transistors failure are presented in this work. The failure phenomenon of abnormal leakage appeared in the collector terminal at low temperatures test. A series of methods including residual gas analysis (RGA), decapping internal inspection, isolation exclusion test and verification test are adopted to analyze the cause of the failure. Based on scanning electron microscope and energy spectrum analyzer examination, the abnormal leakage between the collector and the base terminal is caused by the multiple factors coupling effect. The effect factors include micro cracks in the passivation layer, the internal moisture and the trace of the movable ion. The formation of micro cracks in the passivation layer lies on abnormal passivation process of the chip. It is beneficial to guide the improvement of process control in foundries. Analysis and test method in this failure case could be useful to the similar failure analysis in the future.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"59 2-3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115614207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 1.8V Output RF Energy Harvester at Input Available Power of −20 dBm 一个1.8V输出射频能量采集器，输入可用功率为−20dbm
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2018-11-01 DOI: 10.1109/ICAM.2018.8596407
Qing Cui, Changchun Zhang, Yu-feng Guo, Yi Zhang, Ying Zhang, Fengbo Yuan
{"title":"A 1.8V Output RF Energy Harvester at Input Available Power of −20 dBm","authors":"Qing Cui, Changchun Zhang, Yu-feng Guo, Yi Zhang, Ying Zhang, Fengbo Yuan","doi":"10.1109/ICAM.2018.8596407","DOIUrl":"https://doi.org/10.1109/ICAM.2018.8596407","url":null,"abstract":"This paper presents a RF energy harvester (RFEH) operating at a frequency of 900 MHz in $0.18-1mutext{m}$ CMOS technology. It mainly consists of an RF rectifier, a low dropout voltage regulator (LDO), and a self-starting circuit. A level-l hybrid forward and backward compensation technique is employed for the RF rectifier to lower the equivalent threshold voltage of MOS transistors, which can optimize the sensitivity of the RFEH and the power conversion efficiency (PCE). The LDO is adopted at the output of the RFEH to reduce the output voltage ripple remarkably. The self-starting circuit makes the RFEH perform the energy harvesting without the assistance of external supply. Simulation results show that the RFEH can produce an output voltage of 1.8V and achieve a PCE of 41.2% at an input available power of −20dBm.","PeriodicalId":220324,"journal":{"name":"2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123637336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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