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2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)最新文献

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A chess-based chaotic block cipher 基于象棋的混沌分组密码
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934068
Sherif H. Abdel Haleem, A. Radwan, S. Abd-El-Hafiz
{"title":"A chess-based chaotic block cipher","authors":"Sherif H. Abdel Haleem, A. Radwan, S. Abd-El-Hafiz","doi":"10.1109/NEWCAS.2014.6934068","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934068","url":null,"abstract":"This paper presents a new and efficient block cipher encryption system, which includes confusion as well as diffusion processes. While the confusion process is based on the Lorenz chaotic generator, the diffusion process is chess-based. By utilizing the chess horse movement rules, the diffusion process increases the encryption complexity and improves the differential attack measures. Furthermore, combining chaotic and chess-based algorithms increases the length of the encryption key and, hence, makes brute force attacks infeasible. The encryption system is analyzed using miscellaneous evaluation criteria such as pixel correlation coefficients, differential attack measures, histograms and the NIST statistical test suite. Key sensitivity analysis is also performed and the mean square error and entropy measures are calculated. In addition, several examples are presented for different block sizes showing promising results.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115165368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A fully digital background calibration of timing skew in undersampling TI-ADC 欠采样TI-ADC中时序偏差的全数字背景校准
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933983
Han Le Duc, C. Jabbour, P. Desgreys, O. Jamin, V. Nguyen
{"title":"A fully digital background calibration of timing skew in undersampling TI-ADC","authors":"Han Le Duc, C. Jabbour, P. Desgreys, O. Jamin, V. Nguyen","doi":"10.1109/NEWCAS.2014.6933983","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933983","url":null,"abstract":"This paper proposes a fully digital calibration of timing mismatch for undersampling Time Interleaved Analog-to-Digital Converter (TI-ADC) employed in Software Defined Radio (SDR) receivers. The proposed calibration scheme employs an ideal differentiator filter, a Hilbert transform filter and a scaling factor to compute the derivative of the input in any Nyquist Band (NB). The efficiency of the proposed technique is shown using a four-channel undersampling 60 dB SNR TI-ADC clocked at 2.7 GHz. Monte Carlo simulations show SNDR and SFDR improvements of respectively, 18 dB and 21 dB over the first three NBs.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115437974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
Sub-200 fs rms jitter constant fraction discriminator for streak camera triggering 用于条纹相机触发的200秒以下抖动恒定分数鉴别器
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934029
V. Wlotzko, W. Uhring, P. Summ
{"title":"Sub-200 fs rms jitter constant fraction discriminator for streak camera triggering","authors":"V. Wlotzko, W. Uhring, P. Summ","doi":"10.1109/NEWCAS.2014.6934029","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934029","url":null,"abstract":"Streak camera systems are most of the time triggered by short light pulses affected by amplitude noise. This implies jitter on the trigger signal which degrades the temporal resolution. A Constant Fraction Discriminator (CFD) provides a triggering solution which is immunized to this type of noise. A new CFD design approach is described in this work. With state-of-the-art discrete components in terms of high speed electronics, the designed CFD reaches an ultra-low jitter level. Using a heterodyne measurement technique, the phase noise study reveals a 120 fs rms jitter at fixed light power amplitude. The time walk of the system is evaluated to ±10 ps for a 1:10 optical power ratio. The CFD also offers two distinct outputs for the streak camera: the first provides a square wave signal for the single shot mode and the second provides a high frequency sinusoid for the synchroscan mode.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116681870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A subsampled adaptive subband digital predistortion algorithm 一种次采样自适应子带数字预失真算法
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933976
Dang-Kièn Germain Pham, G. Gagnon, F. Gagnon, P. Desgreys, P. Loumeau
{"title":"A subsampled adaptive subband digital predistortion algorithm","authors":"Dang-Kièn Germain Pham, G. Gagnon, F. Gagnon, P. Desgreys, P. Loumeau","doi":"10.1109/NEWCAS.2014.6933976","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933976","url":null,"abstract":"To reduce energy consumption of transmission sys-tems, the power amplifier in transceiver systems is a key element to be improved. The energy consumption associated with this component represents a major part of the total consumption of transmission systems. Moreover it plays an essential role in the quality of the transmitted signals. Digital predistortion (DPD) is a technique that aims at linearizing power amplifiers and thus allows energy efficiency improvements. However, this technique requires, in the feedback path, wideband and high dynamic range analog-to-digital converters (ADC) and usually large computational resources. Subband digitization with subband DPD algorithm have been proposed to relax the design constraints of the feedback path ADC and the digital processing unit. We present in this article a subsampled RLS-based subband DPD algorithm. We show that the gain in terms of number of multiplications and/or additions per second (MAC/s), between the conventional wideband approach and the subsampled algorithm, tends to the number of subbands. Simulations show that the convergence speed by RLS iteration of the subsampled algorithm is maintained. Therefore, the subsampled algorithm converges with the same number of iterations as the conventional wideband approach. After conver-gence, the residual mean-square-error (MSE) is approximately -76 dB for the conventional wideband algorithm and -70 dB for the proposed algorithm.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117141856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An adaptive pre-emphasis technique with opposite directional training 一种反向训练的自适应预强调技术
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934014
H. Akita, Nobuaki Matsudaira, Chao Chen, T. Ito, S. Ohtsuka
{"title":"An adaptive pre-emphasis technique with opposite directional training","authors":"H. Akita, Nobuaki Matsudaira, Chao Chen, T. Ito, S. Ohtsuka","doi":"10.1109/NEWCAS.2014.6934014","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934014","url":null,"abstract":"This paper presents a novel adaptive pre-emphasis technique for half-duplex communication in asymmetric systems between electronic control units (ECUs) and automotive actuators. Both an adaptive decision feedback equalizer (DFE) and a DFE-like pre-emphasis circuit are implemented in only ECU side in order to compensate frequency dispersion of the automotive-grade harness. By transmittng the traning pattern from the actuator, the coefficients of both DFE and DFE-like pre-emphasis circuit are determined, providing the same equalization characteristics. The proposed pre-emphasis technique enables the actuator to receive already equalized signals without equalization circuit in it. Our simulation results demonstrate more than 200% improvement of the eye openinig for 400Mbps communication with a 5-m harness of more than 10-dB dispersion at the Nyquist frequency.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115174290","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Novel DC-input ΣΔ capacitance-to-digital convertor for biosensor applications 新型直流输入ΣΔ电容-数字转换器，用于生物传感器应用
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933992
G. Nabovati, E. Ghafar-Zadeh, M. Sawan
{"title":"Novel DC-input ΣΔ capacitance-to-digital convertor for biosensor applications","authors":"G. Nabovati, E. Ghafar-Zadeh, M. Sawan","doi":"10.1109/NEWCAS.2014.6933992","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933992","url":null,"abstract":"In this paper we present a novel DC-input ΣΔ modulator architecture for CMOS capacitive sensors based on charge to digital conversion. This new core-CBCM ΣΔ modulator is designed in Cadence software using TSMC 0.35 μm technology, and based on circuit parameters a behavioral model in Matlab is developed. By using behavioral time-domain simulations in Matlab, optimized values of parameters in ΣΔ modulator are determined to improve the overall circuit performance. The simulation results show that the proposed ΣΔ modulator has the dynamic range of 100-110 fF and can reach to the resolution of 10 bits.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114572616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Performance of edge tap decision feedback equalization methods for wireline receivers 有线接收机边缘分接决策反馈均衡方法的性能
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933971
C. Holdenried, R. Bespalko, Marcus van Ierssel, M. Ramezani, D. Cassan, S. Sarvari, Saman Sadr
{"title":"Performance of edge tap decision feedback equalization methods for wireline receivers","authors":"C. Holdenried, R. Bespalko, Marcus van Ierssel, M. Ramezani, D. Cassan, S. Sarvari, Saman Sadr","doi":"10.1109/NEWCAS.2014.6933971","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933971","url":null,"abstract":"DFEs are critical building blocks for long-reach wireline receivers, and optimized hardware implementation for low power is key. DFEs use feedback to equalize data samples. This paper evaluates the advantages and disadvantages of applying feedback optimized for the data eye height to the edge samples. Both loop-unrolled and direct feedback taps are considered. A hybrid method is considered where only feedback from direct taps is applied to the edge samples. Examples highlight the cases in which applying DFE to the edge samples either improves or impairs the data eye. These concepts may be used to optimize DFE hardware implementation for minimal power and area.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128379738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling and simulation of an instrumentation amplifier in high temperature using a VHDL-AMS op-amp model 使用VHDL-AMS运放模型对高温下的仪表放大器进行建模和仿真
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933973
S. Baccar, T. Levi, D. Dallet, F. Barbara
{"title":"Modeling and simulation of an instrumentation amplifier in high temperature using a VHDL-AMS op-amp model","authors":"S. Baccar, T. Levi, D. Dallet, F. Barbara","doi":"10.1109/NEWCAS.2014.6933973","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933973","url":null,"abstract":"In this paper, an “architectural” description of an instrumentation amplifier (in-amp) is used to simulate its common mode rejection ratio (CMRR) and voltage offset (VOS) in high temperature (HT). The simulations are achieved by using two different models of an industrial op-amp: the familiar SPICE macro-model and a customized VHDL-AMS model. By simulating these two parameters in HT, we evaluate in this work dependency between the op-amp model and the in-amp model. This dependency is described first by reviewing theoretical equations. We compare finally the VHDL-AMS simulation accuracy to the SPICE simulation accuracy in HT.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"77 11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129063458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Performance exploration of partially connected 3D NoCs under manufacturing variability 制造变异性下部分连接3D noc性能探索
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6933985
A. Kologeski, F. Kastensmidt, Vianney Lapôtre, A. Gamatie, G. Sassatelli, A. Todri
{"title":"Performance exploration of partially connected 3D NoCs under manufacturing variability","authors":"A. Kologeski, F. Kastensmidt, Vianney Lapôtre, A. Gamatie, G. Sassatelli, A. Todri","doi":"10.1109/NEWCAS.2014.6933985","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6933985","url":null,"abstract":"Several Through-Silicon-Vias (TSVs) may present resistive and open defects due to 3D manufacture variability. This paper advocates the use of 3D Network-on-Chip (NoC) with asynchronous communication interfaces to cope with significant variations in TSV propagation delays. The technique uses serial communication in the vertical channels to reduce the number of TSVs. Based on a representative delay distribution, we compare the average performance considering a non-defective 3D NoC, one with resistive defective TSVs and one with resistive and open defective TSVs. Results show that it is better to adapt the interfaces to cope with large margins of delay than to avoid TSVs by using adaptive routing.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"61 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124322348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Optimization of integrated dickson voltage-multipliers for RF energy harvesting 用于射频能量收集的集成迪克逊电压倍增器的优化
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2014-06-22 DOI: 10.1109/NEWCAS.2014.6934079
Dino Michelon, E. Bergeret, A. D. Giacomo, P. Pannier
{"title":"Optimization of integrated dickson voltage-multipliers for RF energy harvesting","authors":"Dino Michelon, E. Bergeret, A. D. Giacomo, P. Pannier","doi":"10.1109/NEWCAS.2014.6934079","DOIUrl":"https://doi.org/10.1109/NEWCAS.2014.6934079","url":null,"abstract":"This paper presents the performance optimization of a UHF Dickson voltage-multiplier used for Radio-Frequency Energy Harvesting in 130 nm CMOS technology. The main axis of intervention is the strong reduction of parasitic capacitance with layout modifications. An improvement of existing pads is proposed in order to reduce the capacitive coupling. A novel Schottky diode is proposed as well. The latter is characterized by low area occupation and low parasitic capacitance without compromising forward current capabilities. A complete electrical characterization of the new device is included. Time and cost constraints prevented major manufacturing modifications (ex. technology node, circuit topology) yet a remarkable gain in performance is demonstrated. On-wafer measures of a 3-cells Dickson voltage-multiplier RF/DC efficiency will highlight the improvements.","PeriodicalId":216848,"journal":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121853844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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