WSEAS TRANSACTIONS ON ELECTRONICS最新文献

{"title":"Design and Performance Analysis of 4-bit Nano-processor Design for Low Area, Low Power and Minimum Delay Using 32nm FinFET Technology","authors":"A. SujataA., S. Lalitha.Y.","doi":"10.37394/232017.2021.12.1","DOIUrl":"https://doi.org/10.37394/232017.2021.12.1","url":null,"abstract":"The recent technologies in VLSI Chips have grown in terms of scaling of transistor and device parameters but still, there is challenging task for controlling current between the source and drain terminals. For effective control of device current, the FinFET transistors have come into VLSI chip, through which current can be controlled effectively. This paper is to address the issues present in CMOS technology and majorly concentrated on the proposed 4-bit Nano processor using FinFET 32nm technology by using the Cadence Virtuoso software tool. In the proposed Nano processor, the first part is to design using 4bit ALU which includes all basic and universal gates, efficient and high-speed adder, multiplier, and multiplexer. The Carry Save Adder (CSA) and multiplier are the major subcomponents which can optimize the power consumption and area reduction. The second part of the proposed Nano processor is 4-bit 6T SRAM and Encoder and decoder and also Artificial Neural Network (ANN). All these subcomponents are designed at analog transistors (Schematic level) through which the Graphic Data System (GDS-II) is generated through mask layout design. Finally, the verification and validation are done using DRC and LVS, at the last chip-level circuit is generated for chip fabrication. The ALU is designed by using CMOS inverters and the designed ALU schematic is simulated through 32nm FinFET technological library and compared with CMOS technology which is simulated through 32nm CMOS library (without FinFET). The power consumption of AND, OR, XOR, NOT, NAND gates, SRAM, Encoder, Decoder and ANN are 36.09nW, 64.970nW, 61.13nW, 33.31nW, 37.45nW, 32.5% optimization in power dissipation and 47% optimization in leakage current, 2.68uW, 1.98uW and 7.5% improvement in power consumption and 0.5% information loses compressed subsequently respectively. The basic gates and universal gates, CSA, subtraction, and MUX are integrated for 4-bit ALU design, and its delay, power consumption, and area are 0.104nsec, 314.4uW, and 56.8usqm respectively","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132272711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effect of varying Number of Spacing between Antenna Elements, Snapshots, SNR on AP ML, AP-SSF and ESPRIT Algorithm","authors":"Vinod Kumar, S. Dhull","doi":"10.37394/232017.2020.11.17","DOIUrl":"https://doi.org/10.37394/232017.2020.11.17","url":null,"abstract":"The direction of arrival estimation is the main key problem in array signal processing. In this paper, the alternating projection maximum Likelihood (AP-ML), Alternating projection sub space framework (APSSF) and ESPRIT algorithm are studied. The simulation is performed in MATLAB for single and multiple sources. The effect of the varying number of spacing between antenna elements, number of snapshots and SNR are studied. The performance comparison shows that ESPRIT algorithm performs better as compared to the AP-ML and AP-SSF. Key-Words: - AP-ML, AP-SSF, Direction of Arrival, ESPRIT, Snapshots, SNR","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116248539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Preparation and Characterization of CdS/CdTe Device for Radiation Sensing","authors":"H. Shams, H. Abou Gabal, S. Soliman, S. Ebrahim, S. Agamy","doi":"10.37394/232017.2020.11.16","DOIUrl":"https://doi.org/10.37394/232017.2020.11.16","url":null,"abstract":"Several Techniques had been applied to measure Ionizing Radiation. Majority of thistechniques are costly and very complicated. We focus on this research to chemically deposition of CdS to formwith CdTe junction x-ray sensor. CdTe has been electrodeposited onto CdS/FTO glass substrate to formwith previously fabricated CdS layer 4 µm thickness. The optimum potential for CdTe deposition hasbeen studied by potentiostat measurement, it shows that -1.3 is the optimum working potential. The XRDanalysis showed that the CdTe films have highly oriented crystallites with the cubic phase zinc blend withpreferred orientation (111). The band gap Eg extrapolated to be 1.4 eV. Four stacked sensors wereconnected in series to measure the device performance. It was observed that amplitude of the pulseformed due to exposed FTO/CdS/CdTe/Mo detector to X-ray of 33 keV and 1mA intensity is 1.03 V.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124121490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 1GHz Low-cost, Ultra Low-noise Preamplifier","authors":"J. Chatzakis, S. Hassan, E. Clark, M. Tatarakis","doi":"10.37394/232017.2020.11.15","DOIUrl":"https://doi.org/10.37394/232017.2020.11.15","url":null,"abstract":"A high quality, compact 1GHz preamplifier suitable for operation in conjunction with micro channelplates (MCP) and silicon Photomultipliers (SiPM), that is comprised of two integrated circuits is described inthis paper. The amplifier requires no adjustment and has a flat response from low frequencies and adequatebandwidth for high speed measurement systems.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"168 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124690574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Chaos Synchronization of Delayed Quantum Dot Light Emitting Diodes","authors":"H. A. Al Husseini","doi":"10.37394/232017.2020.11.14","DOIUrl":"https://doi.org/10.37394/232017.2020.11.14","url":null,"abstract":"Chaos synchronization of two quantum dot light emitting diodes (QDLEDs) theoretically isstudied, which is delay coupled via a closed or open –loop and mutual coupling system. Whereas thesynchronized- chaotic systems, the dynamics of there are identical to uncoupled DLED under opticalfeedback effect. Complete synchronization was obtained under certain conditions for the couplingparameters. We evaluated the range of the QDLED’s chaos with extrinsic optical feedback in methodsof the chaos synchronization residue diagram and discussion as well of the coherence for the optimalcoupling strength range. With proper conditions of the coupling parameters and the evaluationmethods, the synchronization was satisfactorily obtained between the transmitter and receiver.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129534372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low Power Checks in Multi Voltage Designs","authors":"K. Haripriya, A. Somkuwar, Laxmi Kumre","doi":"10.37394/232017.2020.11.13","DOIUrl":"https://doi.org/10.37394/232017.2020.11.13","url":null,"abstract":"Leakage power consumption has been almost a serious problem these days in semiconductor industry. Many low power techniques like multi-voltage, power gating etc. are deployed to improve power saving. Power aware verification hence has become a critical issue now. Static low power verification has been developed to verify that low power architectures are designed in correct approach meeting all electrical rules in SoC. The UPF(Unified Power Format) is the standardized format that has all power intent information and can be used throughout the design flow to ensure that the power specification is intact. Firstly, this paper describes the special cells and its operation used in low power techniques. Secondly it describes the major checks examined at each stage using Synopsys VCLP tool and finally debugging with the tool and conclusion.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125357588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Impact of static reactive power compensator (SVC) on the power grid","authors":"A. Rahmouni","doi":"10.37394/232017.2020.11.12","DOIUrl":"https://doi.org/10.37394/232017.2020.11.12","url":null,"abstract":"The work presented in this paper is a contribution to the problem of controlling the reactive powers and the voltages in an electrical network. Among these control tools, the static reactive power compensator (SVC) has been chosen because of its simplicity of control. The SVC is among the FACTS 'Alternative Flexible Current Transmission Systems' devices that help to deal with problems encountered in the operation of electrical networks either in the distribution side or in the transport side. In this work, the SVC is used to control the reactive power and the voltage in an electric power transmission network. In order to improve its efficiency, three voltage regulation systems have been chosen in the control system of this compensator.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116831311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Unipolar Reasoning in Electricity: Developing a Digital Two-Tier Diagnostic Test","authors":"A. Métioui, L. Trudel","doi":"10.37394/232017.2020.11.11","DOIUrl":"https://doi.org/10.37394/232017.2020.11.11","url":null,"abstract":"The purpose of this study was to develop a two-tier test to diagnose unipolar reasoning in electricity. Thus, at first, we built a questionnaire composed of four questions with two choices (True / False) with justification. The justification step is methodologically essential; it has allowed us to identify different categories of conceptual representations. Then we administered it to students (N = 100) in the Science education training program. The students’ answers were analyzed and used to create the choices for the two-tier questions. The two-tier questions allow the student to give his explanation if the choices presented do not conform to his representation. Finally, high school students (N = 25) completed an electronic version of the two-tier test to solicit their commentary. The majority was enthusiastic about their participation, despite the conceptual destabilization generated by completing this test.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121802245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Survey on Hybrid Renewable Energy System for Standalone and Grid Connected Applications: Types, Storage Options, Trends for Research and Control Strategies","authors":"Ashwani Kumar","doi":"10.37394/232017.2020.11.10","DOIUrl":"https://doi.org/10.37394/232017.2020.11.10","url":null,"abstract":"This article presents an critical review on various issue concerning to HRES like types, storage, trends for research and control strategies of HRES. Various interconnection techniques for HRES are presented. It has been made a short review of Mathematical model for renewable energy sources. Conclusion and result of control strategies work of HRES, Storage techniques of HRES for energy flow management is presented. Finally, it has been made a summary of the future analysis, challenges in techniques and improvements of HRES based power generation techniques for Isolated and grid connected applications.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134259065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fuzzy Expert System for Recognition of Power Quality Disturbances","authors":"P. Kanirajan, M. Joly","doi":"10.37394/232017.2020.11.8","DOIUrl":"https://doi.org/10.37394/232017.2020.11.8","url":null,"abstract":"This paper presents a new approach to detect and classify power quality disturbances in the power system using Fuzzy C-means clustering, Fuzzy logic (FL) and Radial basis Function Neural Networks (RBFNN). Feature extracted through wavelet is used for training, after training, the obtained weight is used to classify the power quality problems in RBFNN, but it suffers from extensive computation and low convergence speed. Then to detect and classify the events, FL is proposed, the extracted characters are used to find out membership functions and fuzzy rules being determined from the power quality inherence. For the classification,5 types of disturbance are taken in to account. The classification performance of FL is compared with RBFNN.The clustering analysis is used to group the data in to clusters to identifying the class of the data with Fuzzy C-means algorithm. The classification accuracy of FL and Fuzzy C-means clustering is improved with the help of cognitive as well as the social behavior of particles along with fitness value using Particle swarm optimization (PSO),just by determining the ranges of the feature of the membership funtion for each rules to identify each disturbance specifically.The simulation result using Fuzzy C-means clustering possess significant improvements and gives classification results in less than a cycle when compared over other considered approach.","PeriodicalId":202814,"journal":{"name":"WSEAS TRANSACTIONS ON ELECTRONICS","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133942462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}