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2006 IEEE International Integrated Reliability Workshop Final Report最新文献

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Product Reliability Trends, Derating Considerations and Failure Mechanisms with Scaled CMOS 产品可靠性趋势，降额考虑和失效机制与缩放CMOS
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-16 DOI: 10.1109/IRWS.2006.305234
M. White, D. Vu, Due Nguyen, R. Ruiz, Yuan Chen, J. Bernstein
{"title":"Product Reliability Trends, Derating Considerations and Failure Mechanisms with Scaled CMOS","authors":"M. White, D. Vu, Due Nguyen, R. Ruiz, Yuan Chen, J. Bernstein","doi":"10.1109/IRWS.2006.305234","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305234","url":null,"abstract":"As microelectronics is scaled into the deep sub-micron regime, space and aerospace users of advanced technology CMOS are reassessing how scaling effects impact long-term product reliability. The effects of electromigration (EM), time-dependent-dielectric-breakdown (TDDB) and hot carrier degradation (HCI and NBTI) wearout mechanisms on scaled technologies and product reliability are investigated, accelerated stress testing across several technology nodes is performed, and FA is conducted to confirm the failure mechanism(s)","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124914062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Ultra-thin Gate Oxide Lifetime Projection and Degradation Mechanism beyond 90 nm CMOS Technology 超90纳米CMOS技术超薄栅氧化物寿命投影及降解机理
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305242
Cheng-li Lin, T. Kao, Ju-ping Chen, J.Y.C. Yang, K. Su
{"title":"Ultra-thin Gate Oxide Lifetime Projection and Degradation Mechanism beyond 90 nm CMOS Technology","authors":"Cheng-li Lin, T. Kao, Ju-ping Chen, J.Y.C. Yang, K. Su","doi":"10.1109/IRWS.2006.305242","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305242","url":null,"abstract":"In this work, the ultra-thin oxide (Tox = 1.6 nm, named as core oxide) and thick oxide (Tox = 5.2 nm, named as input/output, 10 oxide) lifetime projection and comparison for nFET and pFET under inversion mode stress were investigated. The lifetime of core pFET is worse than that of core nFET, this is opposite to the behavior of their stress leakage current comparison. Nevertheless, the lifetime of IO nFET is worse than that of IO pFET, this is consistent with the behavior of their stress leakage current comparison. In addition, the core pFET possesses smaller exponent n value and TBD comparing with core nFET. In order to investigate this phenomenon, core pFET with substrate bias Vbs is applied to support the proposed mechanism. Presumably due to the larger anode hole current and more hydrogen proton release events result in the core pFET oxide revealing smaller exponent n value, smaller TBD, smaller lifetime prediction and more progressive BD phenomenon than those of core nFET oxide under inversion mode stress","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123039962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Modeling and Characterization of Bias Stress-Induced Instability of SiC MOSFETs SiC mosfet偏置应力不稳定性的建模与表征
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305235
A. Lelis, S. Potbhare, D. Habersat, G. Pennington, N. Goldsman
{"title":"Modeling and Characterization of Bias Stress-Induced Instability of SiC MOSFETs","authors":"A. Lelis, S. Potbhare, D. Habersat, G. Pennington, N. Goldsman","doi":"10.1109/IRWS.2006.305235","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305235","url":null,"abstract":"Threshold voltage instability due to bias stressing has been observed in SiC MOSFETs. Stressing at high gate bias has caused shifts up to several hundred millivolts in the threshold voltage of SiC MOSFETs which can significantly affect circuit performance. We have tried to characterize this threshold voltage instability by experimental and numerical modeling analyses. We see appreciable instability for stress times as less as 10s and stress voltages as low as 4V. Comparison of experiment and simulation indicates that this threshold voltage instability is caused due to excess oxide trapped charge, and also that the instability is reversible","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122350950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Stress migration phenomena in narrow copper lines 窄铜线中的应力迁移现象
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305205
H. Matsuyama, T. Kouno, T. Suzuki, M. Shiozu, H. Ehara, S. Otsuka, T. Hosoda, T. Nakamura, Y. Mizushima, K. Shono, M. Miyajima
{"title":"Stress migration phenomena in narrow copper lines","authors":"H. Matsuyama, T. Kouno, T. Suzuki, M. Shiozu, H. Ehara, S. Otsuka, T. Hosoda, T. Nakamura, Y. Mizushima, K. Shono, M. Miyajima","doi":"10.1109/IRWS.2006.305205","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305205","url":null,"abstract":"Stress migration (SM) behavior in narrow lines is investigated in detail using different kinds of test patterns. The characteristic of 0.14mum wide line SM failure is different from that of wider line SM failure. The failure rate in the minimum 0.14mum wide line is more than that in 0.2-0.42mum wide lines. The Weibull shape parameter \"m\" is about 5 in the case of 0.14mum wide line SM failure, in another case they are around 1.4 to 3. Process dependence is also different. These results of the test patterns with different VIA arrangements clarified that the contact between VIA bottom and upper edge in M1 line plays an important role in SM phenomena in narrow copper lines","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134285869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Leakage current variation with time in Ta2O5 MIM and MIS capacitors Ta2O5 MIM和MIS电容器泄漏电流随时间的变化
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305226
J. Manceau, S. Bruyère, S. Jeannot, A. Sylvestre, P. Gonon
{"title":"Leakage current variation with time in Ta2O5 MIM and MIS capacitors","authors":"J. Manceau, S. Bruyère, S. Jeannot, A. Sylvestre, P. Gonon","doi":"10.1109/IRWS.2006.305226","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305226","url":null,"abstract":"In this paper Ta2O5 current instability in MIM and MIS capacitors is studied over several sample thicknesses with a current versus time measurement and a low frequency dielectric spectroscopy. Three types of phenomena is identified: polarization current (attributed to dielectric relaxation phenomena), conduction current (attributed to a Poole-Frenkel mechanism) and resistance degradation. This last one has been attributed to ionic diffusion in dielectric and follows the space-charge-limited (SCL) theory. According to physical characterization the origin of resistance degradation has been attributed to oxygen vacancies migration","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131103233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Reliability Characteristics of a 150GHZ fT/fmax Si/SiGeC Heterojunction Bipolar Transistor Under Reverse, Forward and Mixed-Mode Stress 150GHZ fT/fmax Si/SiGeC异质结双极晶体管在反向、正向和混合模式应力下的可靠性特性
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305211
M. Ruat, J. Bourgeat, M. Marin, G. Ghibaudo, N. Revil, G. Pananakakis
{"title":"Reliability Characteristics of a 150GHZ fT/fmax Si/SiGeC Heterojunction Bipolar Transistor Under Reverse, Forward and Mixed-Mode Stress","authors":"M. Ruat, J. Bourgeat, M. Marin, G. Ghibaudo, N. Revil, G. Pananakakis","doi":"10.1109/IRWS.2006.305211","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305211","url":null,"abstract":"Major reliability characteristics of studied HBT infer dual conclusions. On a first level, similar electrical response to any type of stress is measured as HC are responsible for the creation of mid-gap defects, giving rise to a G-R leakage current component. A common basis for base current degradation model is thus provided. On a second level, acceleration factors, defects location, impact on LF noise and recovery behavior are different. Defect types are thus distinct. Degradation model, in turn, must be adapted to each type of stress","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127321362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Negative Bias Stressing Interface Trapping Centers in Metal Gate Hafnium Oxide Field Effect Transistors Using Spin Dependent Recombination 利用自旋相关复合研究金属栅氧化铪场效应晶体管的负偏置应力界面俘获中心
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305201
C. Cochrane, P. Lenahan, J.P. Campbell, G. Bersuker, A. Neugroschel
{"title":"Negative Bias Stressing Interface Trapping Centers in Metal Gate Hafnium Oxide Field Effect Transistors Using Spin Dependent Recombination","authors":"C. Cochrane, P. Lenahan, J.P. Campbell, G. Bersuker, A. Neugroschel","doi":"10.1109/IRWS.2006.305201","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305201","url":null,"abstract":"We combine conventional metal oxide semiconductor (MOS) gated diode measurements and very sensitive electrically detected electron spin resonance (ESR) measurements to detect and identify negative bias temperature instability (NBTI) generated defect centers in fully processed HfO2 pMOS field effect transistors (pMOSFETs). The spectra were found to be quite different from those generated by NBTI in conventional Si/SiO2 based devices. The defect spectra generated by long term stressing differ from the short term stressing signals and are somewhat similar to those observed in plasma nitrided oxide Si/SiO2 based devices. These traces are similar in that their ESR g values are virtually identical. Our results strongly suggest that, in these HfO2 based devices, NBTI defects are located in the interfacial SiO2 layer","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127356514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Residual resistivity model and its application 剩余电阻率模型及其应用
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305227
L. Doyen, X. Federspiel, D. Ney, G. Sers, L. Arnaud, Y. Wouters
{"title":"Residual resistivity model and its application","authors":"L. Doyen, X. Federspiel, D. Ney, G. Sers, L. Arnaud, Y. Wouters","doi":"10.1109/IRWS.2006.305227","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305227","url":null,"abstract":"Taking into account Matthiessen's rules, we have developed a model of residual resistivity with line dimensions. The method developed allows distinguishing the effect of impurities and the sizing effect. Thus we are able to determine line dimensions consistent with process variation. Finally this model allows an appreciable evaluation of the TCR","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123320896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Surface Morphology Change of Titanium Nitride Film after Metal Layer Photolithography Rework Causing Oxide Film De-lamination 金属层光刻返工引起氧化膜脱层后氮化钛膜表面形貌的变化
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305249
H. T. Chiew, Jacqueline Tan, Selinda Lim, K. S. Lee, L. Y. Ren, B. C. Lee, P. S. Quek, K. S. Pey
{"title":"Surface Morphology Change of Titanium Nitride Film after Metal Layer Photolithography Rework Causing Oxide Film De-lamination","authors":"H. T. Chiew, Jacqueline Tan, Selinda Lim, K. S. Lee, L. Y. Ren, B. C. Lee, P. S. Quek, K. S. Pey","doi":"10.1109/IRWS.2006.305249","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305249","url":null,"abstract":"Typical photolithography rework process involves a resist wet strip following by a dry descum process. It is found that the de-lamination phenomena correlate to longer descum timing in the rework route. Hypothesis of the de-lamination suggests a change in the surface roughness of TiN after being subjected to descum process. This hypothesis is supported by various experiments conducted. Surface morphology of TiN changes from columnar structure to thorn shape protuberance. The sheet resistivity of TiN is also increased with increase of descum time. Optimization of the descum time during metal layer photolithography rework makes the surface of TiN smoother and it eliminates the de-lamination issue. The mechanism of this effect is also discussed in this paper","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121568939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories 嵌入式非易失性存储器中快速充电损耗机制的可靠性问题
2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI: 10.1109/IRWS.2006.305213
P. Mora, S. Renard, G. Bossu, P. Waltz, G. Pananakakis, G. Ghibaudo
{"title":"Reliability issues related to Fast Charge Loss Mechanism in Embedded Non Volatile Memories","authors":"P. Mora, S. Renard, G. Bossu, P. Waltz, G. Pananakakis, G. Ghibaudo","doi":"10.1109/IRWS.2006.305213","DOIUrl":"https://doi.org/10.1109/IRWS.2006.305213","url":null,"abstract":"In this work, we report on a thorough study of charge loss in embedded non volatile memories. We focused on the fast initial threshold voltage (Vth) shift, which occurs during the first minutes of data retention bake. Experiments were performed to have a better understanding of this phenomenon. As a result, we can predict the Vth shift of a cell baked at 250degC and evaluate its impact on product reliability. This is the first time that this reliability aspect is characterized with such a level of accuracy. Based on these observations, a physical model is proposed to describe the fast initial threshold voltage shift","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115418648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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