{"title":"A bit-parallel molybdenum disulfide computer built through multi-level co-optimization","authors":"Dongxu Fan, Yun Mao, Hao Qiu, Rui Li, Fei Lu, Wenqiang Yuan, Yibiao Yin, Zhihui Zheng, Zhoushuo Han, Yuan Tian, Xiushan Yan, Taotao Li, Shitong Zhu, Yanbin Li, Weisheng Li, Xuecou Tu, Chunsong Zhao, Jian-Bin Xu, Jeffrey Xu, Yi Shi, Xinran Wang","doi":"10.1038/s41928-026-01641-0","DOIUrl":"10.1038/s41928-026-01641-0","url":null,"abstract":"The sustainable development of artificial intelligence requires energy-efficient computing technology. Two-dimensional semiconductor digital electronics could potentially provide such capabilities, and promising single devices and small circuits have been developed. However, very large-scale integration remains challenging due to the inability to control atomic-scale defects and mesoscopic device variations, as well as the lack of macroscopic variation-aware design methodology. Here we report a molybdenum disulfide computer that combines a 0.5-μm industrial fabrication process and a back-end-of-line-integrated academia laboratory process. The computer comprises 1,433 transistors interconnected by four metal layers within a compact footprint, offering an integration density of around 9,336 transistors per square millimetre. The computer can store data on-chip in the register file and perform arithmetic operations on multiple-bit data parallelly at a 1-kHz clock frequency. Key to the development of this system is a multi-level co-optimization methodology that spans transistor, standard cell, logic synthesis and interconnect design. By combining a 0.5-μm industrial fabrication process and a back-end-of-line academia laboratory process, as well as using a multi-level co-optimization methodology, a molybdenum disulfide computer can be fabricated that comprises 1,433 transistors interconnected by four metal layers.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 8","pages":"887-896"},"PeriodicalIF":42.3,"publicationDate":"2026-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148288441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A robot that’s hard to love","authors":"Matthew Parker","doi":"10.1038/s41928-026-01648-7","DOIUrl":"10.1038/s41928-026-01648-7","url":null,"abstract":"","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 5","pages":"456-456"},"PeriodicalIF":40.9,"publicationDate":"2026-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148100551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-performance p-type monolayer tungsten diselenide transistors","authors":"Lei Sun, Tingting Gao, Xiubin Li, Teresa Cusati, Damiano Marian, Giuseppe Iannaccone, Jing Li, Yuhui He, Jialin Yang, Shengli Zhang, Gianluca Fiori, Xuefei Li, Xiangshui Miao","doi":"10.1038/s41928-026-01637-w","DOIUrl":"10.1038/s41928-026-01637-w","url":null,"abstract":"Two-dimensional semiconductors are potential channel materials for future scaled complementary transistor technologies due to their high carrier mobility and strong immunity to the short-channel effect. However, the electrical performance of p-type transistors is still far below that of their n-type counterparts. Here we report high-performance p-type monolayer tungsten diselenide transistors with a hole mobility of 137 cm2 V−1 s−1 and a contact resistance of approximately 560 Ω µm at room temperature. Our approach uses an industry-compatible and tunable oxygen-incorporated technique to heal the defect states. A scaled p-type monolayer tungsten diselenide transistor with a channel length of 45 nm exhibits an on-state current of 1,245 μA μm−1 and an on/off ratio of ~109. Using an industry-compatible and tunable oxygen-incorporated technique to heal defect states, p-type monolayer tungsten diselenide transistors can be created with a hole mobility of 137 cm2 V−1 s−1 and a contact resistance of approximately 560 Ω µm at room temperature.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 7","pages":"758-765"},"PeriodicalIF":42.3,"publicationDate":"2026-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148287480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Songsong Li, Zixuan Zhao, Max Weires, Shiyu Hu, Yang Li, Lingfeng Tang, Shilei Dai, Yahao Dai, Youdi Liu, Nan Li, Wei Liu, Naisong Shan, Junyi Yin, Xiaoao Shi, Sean Sutyak, Cheng Zhang, Jie Xu, Junhong Chen, Yuepeng Zhang, Igor R. Efimov, Fangfang Xia, Sihong Wang
{"title":"A large-scale stretchable neuromorphic circuit for on-body edge computing","authors":"Songsong Li, Zixuan Zhao, Max Weires, Shiyu Hu, Yang Li, Lingfeng Tang, Shilei Dai, Yahao Dai, Youdi Liu, Nan Li, Wei Liu, Naisong Shan, Junyi Yin, Xiaoao Shi, Sean Sutyak, Cheng Zhang, Jie Xu, Junhong Chen, Yuepeng Zhang, Igor R. Efimov, Fangfang Xia, Sihong Wang","doi":"10.1038/s41928-026-01639-8","DOIUrl":"10.1038/s41928-026-01639-8","url":null,"abstract":"Intrinsically stretchable electronics can be used to make wearable devices that collect large amounts of multimodal sensory data. This has led to a demand for enhanced near-sensor computing capabilities that can process such data. One potential solution is neuromorphic edge computing implemented using stretchable organic electrochemical transistors, but the lack of a scalable fabrication method for these transistors has limited the size and complexity of the systems. Here we report the fabrication of large-scale, intrinsically stretchable organic electrochemical transistor arrays with a density up to 10,000 transistors per square centimetre. The transistors exhibit good synaptic performance, including linear, precise conductance programming and good retention. The performance uniformity of the array enables the hardware implementation of a stretchable artificial neural network for processing health data, including heart attack risk assessment and kernel convolution for locating propagation wavefronts. We also explore the potential of implementing reinforcement learning algorithms on the neuromorphic circuits for use in soft robotics. A photolithographic fabrication process can be used to create soft and stretchy organic electrochemical transistor arrays that have a density up to 10,000 devices per square centimetre, and can perform edge computing tasks in wearable devices and soft robots.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 8","pages":"906-918"},"PeriodicalIF":42.3,"publicationDate":"2026-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148287481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhenyu Wang, Guilherme Migliato Marega, Eloi Collette, Mukesh Tripathi, Hyun Goo Ji, Zhi Tao, Nan Zheng, Aleksandra Radenovic, Gino Giusi, Giuseppe Iannaccone, Jianhua Zhang, Andras Kis
{"title":"Non-volatile memories based on patterned metal–semiconductor heterostructures of niobium disulfide and molybdenum disulfide","authors":"Zhenyu Wang, Guilherme Migliato Marega, Eloi Collette, Mukesh Tripathi, Hyun Goo Ji, Zhi Tao, Nan Zheng, Aleksandra Radenovic, Gino Giusi, Giuseppe Iannaccone, Jianhua Zhang, Andras Kis","doi":"10.1038/s41928-026-01634-z","DOIUrl":"10.1038/s41928-026-01634-z","url":null,"abstract":"The performance of transistors based on two-dimensional transition metal dichalcogenide semiconductors is restricted by the poor interface quality between two-dimensional materials and conventional three-dimensional contacts. Transition-metal-dichalcogenide-based metal–semiconductor heterostructures have been developed to enhance device performance, but finding fabrication techniques that combine high-quality growth with scalability and broad applicability remains a challenge. Here we show that a method that combines metal–organic chemical vapour deposition and sulfurization can be used to create patterned heterostructures of niobium disulfide and molybdenum disulfide at the wafer scale. The niobium disulfide–molybdenum disulfide heterostructures can be used as the active channel material of field-effect transistors and non-volatile memory devices. Compared with pristine molybdenum disulfide, the heterostructures exhibit up to nine times higher on current due to a reduced contact resistance, a maximum effective mobility of 77 cm2 V−1 s−1 and a 95.8% yield (of 144 field-effect transistors). Furthermore, our floating-gate field-effect transistors show a large programming window, precise and continuous conductance modulation, endurance over 60,000 programming pulses and an estimated retention time of around 19 years. Device simulation shows that the large programming window of the long-channel devices (around 14 V) can be maintained at scaled gate lengths below 100 nm with proper control oxide scaling. Patterned and scalable two-dimensional metal–semiconductor heterostructures formed between niobium disulfide and molybdenum disulfide can be created using an in situ sulfurization process and used to make field-effect transistors and non-volatile memory devices.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 7","pages":"766-774"},"PeriodicalIF":42.3,"publicationDate":"2026-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.nature.comhttps://www.nature.com/articles/s41928-026-01634-z.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148287499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A universal stretchable cable","authors":"Hyunjin Lee, Dae-Hyeong Kim","doi":"10.1038/s41928-026-01640-1","DOIUrl":"10.1038/s41928-026-01640-1","url":null,"abstract":"A core–shell cable that combines extreme elasticity with robust electrical performance can be used to bridge a range of terminal electronics including soft, rigid and hybrid electronic modules.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 5","pages":"463-464"},"PeriodicalIF":40.9,"publicationDate":"2026-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148100631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Woodworking-inspired mechanical metainterfaces show improved energy transport","authors":"","doi":"10.1038/s41928-026-01621-4","DOIUrl":"10.1038/s41928-026-01621-4","url":null,"abstract":"Interfaces are the main bottleneck for electrical and thermal transport through materials. Now, inspired by ancient carpentry joints, mechanical metainterfaces are developed that increase electrical transport and heat dissipation, with potential applications in electronics and power systems.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 6","pages":"592-593"},"PeriodicalIF":42.3,"publicationDate":"2026-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148336895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}