2010 IEEE Computer Society Annual Symposium on VLSI最新文献

Two-Dimensional Dynamic Multigrained Reconfigurable Hardware 二维动态多粒度可重构硬件

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.9

L. Braun, J. Becker

引用次数: 4

BLAKE HASH Function Family on FPGA: From the Fastest to the Smallest FPGA上的BLAKE HASH函数族:从最快到最小

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.115

N. Sklavos, P. Kitsos

引用次数: 23

Fine-Grained Fault Tolerance for Process Variation-Aware Caches 过程变化感知缓存的细粒度容错

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.57

Tayyeb Mahmood, Soontae Kim

引用次数: 10

Self-Freeze Linear Decompressors for Low Power Testing 用于低功耗测试的自冻结线性减压器

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.37

V. Tenentes, X. Kavousianos

引用次数: 2

Challenges and Perspectives of Computer Architecture at the Nano Scale 纳米尺度下计算机体系结构的挑战与展望

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.118

C. Gamrat

引用次数: 8

A Homogeneous MPSoC with Dynamic Task Mapping for Software Defined Radio 基于动态任务映射的软件无线电同构MPSoC

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.110

Camille Jalier, D. Lattard, G. Sassatelli, P. Benoit, L. Torres

引用次数: 7

FPGA-Based Runtime Adaptive Multiprocessor Approach for Embedded High Performance Computing Applications 基于fpga的运行时自适应多处理器嵌入式高性能计算方法

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.30

D. Göhringer, J. Becker

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引用次数: 10

Mapping Embedded Applications on MPSoCs: The MNEMEE Approach mpsoc上的嵌入式应用映射:MNEMEE方法

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.96

Christos Baloukas, Lazaros Papadopoulos, D. Soudris, S. Stuijk, Olivera Jovanovic, F. Schmoll, D. Cordes, R. Pyka, A. Mallik, S. Mamagkakis, F. Capman, S. Collet, N. Mitas, D. Kritharidis

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引用次数: 9

Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform 在可扩展运行时可重构平台上加速数值线性代数核

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.65

P. Biswas, Pramod Udupa, Rajdeep Mondal, Keshavan Varadarajan, M. Alle, S. Nandy, R. Narayan

引用次数: 7

A Novel 1.8 V, 1066 Mbps, DDR2, DFI-Compatible, Memory Interface 一种新颖的1.8 V, 1066 Mbps, DDR2, dfi兼容，内存接口

2010 IEEE Computer Society Annual Symposium on VLSI Pub Date : 2010-07-05 DOI: 10.1109/ISVLSI.2010.49

A. Alexandropoulos, E. Davrazos, F. Plessas, M. Birbas

引用次数: 3