{"title":"Battery pack circuit design for safety and protection","authors":"M. Dewey, D. Chandler, A. Tamura","doi":"10.1109/WESCON.1995.485438","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485438","url":null,"abstract":"Do our fast-paced lifestyles drive new technology, or is new technology partly to blame for continuing to increase the pace of our lifestyles? We want to be connected and productive - or entertained - even during our traditional times of leisure and recreation. Our tools for connectivity and productivity - and our toys for entertainment - support us by continuing to become smaller, lighter and more mobile, even as functionality increases. This drive toward increasing portability, mobility and functionality has had many interesting results. One result is that high-energy battery packs are becoming pervasive in our professional and personal lives. But the high power-delivery and energy-storage capabilities of packs for these power-hungry devices generally remain invisible to end-users. In reality, most packs have the potential not only for damaging themselves, but also for imposing damage on their surroundings, even if used exclusively in accordance with manufacturers` instructions. And newer battery technologies that offer longer runtimes or less weight can pose higher risks. This paper compares and contrasts the characteristics of various safety practices and devices used in designing and assembling high-energy battery packs.","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115011330","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Electric-bicycle propulsion power","authors":"H. Oman, W. C. Morchin, F. Jamerson","doi":"10.1109/WESCON.1995.485440","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485440","url":null,"abstract":"In a human-powered hybrid electric vehicle (HPHEV) the travel distance available from a single battery charge can be lengthened with power from another source, the cyclist`s leg muscles. In a battery-powered electric bicycle the propulsion power goes mostly into overcoming aerodynamic drag. For example, at 18 km per hour (11 miles per hour) this drag represents 200 watts at the tire-to-road interface for a typical cyclist`s shape and clothing. Today`s typical electrical bicycle is propelled by a high-speed dc motor which is powered from a lead-acid battery. The combined efficiency of the motor and its speed-reducing gears is 50 to 65 percent. In this paper we calculate available travel distances, as a function of speed, grade, and the battery energy-content as measured in watt-hours per kg. We show the effect of battery cost and charge/discharge cycle-life on travel cost in terms of cents per kilometer travelled. Designs used in today`s electric bicycles are illustrated.","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133467419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability issues in power and ground on submicron circuits","authors":"J.F. Tuan, T. K. Young","doi":"10.1109/WESCON.1995.485265","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485265","url":null,"abstract":"The reliability of the power supply network is becoming an important issue for IC designers as circuit sizes increase. The reliability problems in power networks are electromigration, voltage drop, and ground bounce. RailMill is an integrated environment that addresses the power network reliability problems. RailMill covers four important aspects in power network analysis: accurate extraction of power networks, accurate simulation of transistor circuits, accurate simulation of power networks and layout display of circuit and simulation results.","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132967177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA migration to ASICs","authors":"V. Hopkin, B. Kirk","doi":"10.1109/WESCON.1995.485289","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485289","url":null,"abstract":"","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115472352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Manfrini, P. Stauffer, M. Leoncini, C. Diederich
{"title":"Dual concentric conductor arrays for microwave hyperthermia: theoretical study of design parameters","authors":"V. Manfrini, P. Stauffer, M. Leoncini, C. Diederich","doi":"10.1109/WESCON.1995.485479","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485479","url":null,"abstract":"","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114678298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Live insertion design approaches","authors":"K. Filliter, R. Klem, P.R. LaFlamme","doi":"10.1109/WESCON.1995.485254","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485254","url":null,"abstract":"Applications in the Telecommunications Industry and elsewhere often have the requirement for 100% “up” time. This implies that system upgrades and maintenance must be conducted with power applied and the system operational. When replacing faulty or obsolete cards, removal and insertion must be accomplished without damaging the interface ICs and ideally without disrupting the Backplane This paper investigates the various approaches to IC design intended to facilitate Live Insertion. A proposal for an Designing an interface for live insertion ideally would a) Selecting a robust busdriver designed and suited for live insertion. b) Develop power sequencing schemes which control the timing and voltages delivered to the busdriver ICs. require two steps: Live Insertion Levels Industry Standard IC test Method is proposed. Prior to our discussion it is worthwhile to define several","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"23 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120876249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Graphical user interface for SONET product evaluation systems","authors":"C. Poirier","doi":"10.1109/WESCON.1995.485306","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485306","url":null,"abstract":"As the telecommunication industry moves forward in its deployment of Synchronous Optical NETwork (SONET) services, several integrated circuit manufacturers are beginning to provide standard product solutions. The design engineers for the equipment manufacturers need to evaluate and differentiate between all the choices available to them. One solution to assist the design engineer is to provide a Product Evaluation System that enables the design engineer to completely evaluate and examine a particular standard product. Rather than having to acquire the device and the learning’s needed to implement a prototype design just to examine the functionality of a single device, the design engineer can simply use an Evaluation System to study a device’s functionality in order to determine if a particular device fits into their solution. To make the Product Evaluation System effective, the design engineer must be able to begin using it in an evaluation environment immediately. One key to a valuable Product Evaluation System is an easy to use and inexpensive interface. For ease of use and portability, the graphical user interface (GUI) provided by the Microsoft@ WindowsTM shell or operating system and used on many personal computers and laptops is an option. Providing such an interface with a Product Evaluation System provides the design engineer with the means to quickly and effectively use the system for device evaluation. The graphical user interface provides the design engineer with a recognizable, easy to use, and portable tool for product evaluation. This paper discusses the importance, advantages, and uses provided with graphical user interfaces for SONET Product Evaluation Systems. Along with describing the graphical user interface for such a system, a case study of a SONET Product Evaluation System which uses a graphical interface is provided.","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121123007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Accurate modeling of capacitive, resistive and inductive effects of interconnect","authors":"Ching-Chao Huang, J. Chern","doi":"10.1109/WESCON.1995.485262","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485262","url":null,"abstract":"Besides reviewing the numerical techniques in computing resistance, inductance, and capacitance, this paper addresses the challenges to accurately model the deep-submicron on-chip interconnects. Deriving regression equations from numerous runs of Poisson field solvers, one can easily transfer the accuracy of physical simulation to the rule-based full-chip layout parasitic extractors. Such methodology, which was implemented in the program Raphael, can be extended to the PCB and other package applications, and help create rules for place-and-route.","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"242 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116001439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Neural networks and fuzzy logic made simple","authors":"M. Masri","doi":"10.1109/WESCON.1995.485448","DOIUrl":"https://doi.org/10.1109/WESCON.1995.485448","url":null,"abstract":"Engineers and scientists are in a constant strive to emulate the learning process in the human brain, it's ability to generalize and adapt to changes. The neural network technology was developed with this goal in mind, and is currently being used in real time control applications benefiting from these advanced features. Fuzzy logic on the other hand is a problem solving technique that uses approximate description of the system using simple rules in a human language like English. At first glance, these technologies appear difficult to comprehend and intimidating to use in an actual application. This paper will bring both of these technologies to an understanding level and will show how the combination of both technologies, NeuFuz, takes advantage of both Neural Networks and Fuzzy Logic by eliminating their drawbacks, thus providing the design engineer with a very simple tool that reduces design time and provides a more effective solution. A design of a fan controller will be discussed as an application of this technology. 1.0 Introduction Control applications today demand more and more intelligence and flexibility. These requirements demand for a control system that can handle non linearity and time variation. Moreover the control system should be simple to understand and easy to develop. Conventional techniques are not well suited for nonlinear time variant applications. Neural networks is an elegant solution for nonlinear applications. It requires a number of data sets representing the output as a function of the inputs, covering the entire range of operation. This data is used to train the neural network. Once the training is completed the neural network can generalize and determine an output from any input applied. The neural network is a network of interconnected neurons, where each neuron has the ability to compute an output signal based on all the incoming signals from the neurons connected to it in the previous stage. This output signal is then multiplied by the corresponding weights (the connection strength) before being transmitted to the neuron on the next stage. The neural network weights, or in other words, the connection strengths between neurons are determined in a process called learning, ISBN# 0-7803-2636-9 596 the process of training the neural network for a specific application to a desired level of accuracy. Although this technology can handle non linear system requirements well but is often expensive to implement. Fuzzy Logic is another technique that has been proven very successhl in solving nonlinear problems in many areas where mathematical modeling of the system is difficult or costly to implement. Fuzzy logic offers in these design cases simplicity and ease in design. However Fuzzy logic has some problems as well: The process in Fuzzy Logic is to determine membership functions for the inputs and outputs and generate a number of rules for the application . One important factor here is that membership functions and rules ha","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"152 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114173828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}