{"title":"实时插入设计方法","authors":"K. Filliter, R. Klem, P.R. LaFlamme","doi":"10.1109/WESCON.1995.485254","DOIUrl":null,"url":null,"abstract":"Applications in the Telecommunications Industry and elsewhere often have the requirement for 100% “up” time. This implies that system upgrades and maintenance must be conducted with power applied and the system operational. When replacing faulty or obsolete cards, removal and insertion must be accomplished without damaging the interface ICs and ideally without disrupting the Backplane This paper investigates the various approaches to IC design intended to facilitate Live Insertion. A proposal for an Designing an interface for live insertion ideally would a) Selecting a robust busdriver designed and suited for live insertion. b) Develop power sequencing schemes which control the timing and voltages delivered to the busdriver ICs. require two steps: Live Insertion Levels Industry Standard IC test Method is proposed. Prior to our discussion it is worthwhile to define several","PeriodicalId":177121,"journal":{"name":"Proceedings of WESCON'95","volume":"23 4","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Live insertion design approaches\",\"authors\":\"K. Filliter, R. Klem, P.R. LaFlamme\",\"doi\":\"10.1109/WESCON.1995.485254\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Applications in the Telecommunications Industry and elsewhere often have the requirement for 100% “up” time. This implies that system upgrades and maintenance must be conducted with power applied and the system operational. When replacing faulty or obsolete cards, removal and insertion must be accomplished without damaging the interface ICs and ideally without disrupting the Backplane This paper investigates the various approaches to IC design intended to facilitate Live Insertion. A proposal for an Designing an interface for live insertion ideally would a) Selecting a robust busdriver designed and suited for live insertion. b) Develop power sequencing schemes which control the timing and voltages delivered to the busdriver ICs. require two steps: Live Insertion Levels Industry Standard IC test Method is proposed. Prior to our discussion it is worthwhile to define several\",\"PeriodicalId\":177121,\"journal\":{\"name\":\"Proceedings of WESCON'95\",\"volume\":\"23 4\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of WESCON'95\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WESCON.1995.485254\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of WESCON'95","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WESCON.1995.485254","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Applications in the Telecommunications Industry and elsewhere often have the requirement for 100% “up” time. This implies that system upgrades and maintenance must be conducted with power applied and the system operational. When replacing faulty or obsolete cards, removal and insertion must be accomplished without damaging the interface ICs and ideally without disrupting the Backplane This paper investigates the various approaches to IC design intended to facilitate Live Insertion. A proposal for an Designing an interface for live insertion ideally would a) Selecting a robust busdriver designed and suited for live insertion. b) Develop power sequencing schemes which control the timing and voltages delivered to the busdriver ICs. require two steps: Live Insertion Levels Industry Standard IC test Method is proposed. Prior to our discussion it is worthwhile to define several