2015 Forum on Specification and Design Languages (FDL)最新文献_第2页

Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface 基于功能模型接口的多域汽车系统虚拟半实物联合仿真

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306355

Robert Buecs, L. Murillo, Ekaterina Korotcenko, Gaurav Dugge, R. Leupers, G. Ascheid, A. Ropers, Markus Wedler, A. Hoffmann

{"title":"Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface","authors":"Robert Buecs, L. Murillo, Ekaterina Korotcenko, Gaurav Dugge, R. Leupers, G. Ascheid, A. Ropers, Markus Wedler, A. Hoffmann","doi":"10.1109/FDL.2015.7306355","DOIUrl":"https://doi.org/10.1109/FDL.2015.7306355","url":null,"abstract":"Modern cars require powerful multi- and many-core hardware platforms to fulfill the demands of upcoming computationally intensive advanced driver assistance systems. This leads to a distributed hardware/software architecture that poses an unbearable system complexity to designers. Additionally, the strict requirements of new functional safety standards make it extremely difficult to rapidly and comprehensively close the development-evaluation-debug cycle. To overcome these complications, virtual platform technology is a promising approach that provides full hardware/software visibility, controllability and adequate simulation speed at electronic system level. However, for highly heterogeneous systems, such as modern cars, this technology lacks the capability to capture and integrate interactions of multiple subsystems beyond the hardware/software domain. To bridge this gap, this work presents multiple methods to facilitate the integration of virtual platforms into complex heterogeneous multi-domain vehicular simulation systems via the Functional Mock-Up Interface (FMI), the de facto co-simulation standard for automotive. The presented approaches significantly increase the depth of functional safety testing, as holistic car simulation covers cross-domain interactions of its subsystems.","PeriodicalId":171448,"journal":{"name":"2015 Forum on Specification and Design Languages (FDL)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129321435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 20

Architectural system modeling for correct-by-construction RTL design 按结构正确RTL设计的体系结构建模

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306086

J. Urdahl, D. Stoffel, W. Kunz

{"title":"Architectural system modeling for correct-by-construction RTL design","authors":"J. Urdahl, D. Stoffel, W. Kunz","doi":"10.1109/FDL.2015.7306086","DOIUrl":"https://doi.org/10.1109/FDL.2015.7306086","url":null,"abstract":"This paper works towards a new design flow in which a design model at an architectural system level is refined into an RTL implementation in such a way that architectural model and RTL implementation stand in a well-defined formal relationship to each other. Functional properties valid at the system level are guaranteed to hold also in the concrete implementation without any additional verification efforts at the RTL. Based on the notion of path predicate abstraction (PPA) introduced in previous work, this paper contributes an \"architectural modeling language (AML)\" which formalizes the semantics of the architectural description level w.r.t. a PPA. The language is intended to be used only as an intermediate description automatically derived from standardized ESL languages such as SystemC when these descriptions are restricted to a mappable subset. Such an intermediate representation is needed to overcome the limitations of SystemC in precisely defining the semantics of the design model and its interfaces as well as to cope with the overwhelming expressive power of SystemC and the large syntactical diversity it allows. With an AML description of the architectural model as a starting point, the paper will show how properties in a standard language like SVA can be automatically generated that guarantee the correctness of the implementation when proven on the design after all refinement steps in the design and the property set have been completed.","PeriodicalId":171448,"journal":{"name":"2015 Forum on Specification and Design Languages (FDL)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123166712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Building a dynamically reconfigurable system through a high development flow 通过高开发流程构建动态可重构系统

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306090

D. Fuente, Jesús Barba, X. Peña, J. C. López, P. Peñil, P. Sánchez

引用次数: 5

Towards a toolchain for assertion-driven test sequence generation 走向一个工具链，用于断言驱动的测试序列生成

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306354

L. Pierre

引用次数: 2

Mixed-criticality system modelling with dynamic execution mode switching 具有动态执行模式切换的混合临界系统建模

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306356

Philipp Ittershagen, Kim Grüttner, W. Nebel

引用次数: 10

Enhancing analysability and time predictability in UML/MARTE component-based application models 增强基于UML/MARTE组件的应用程序模型中的可分析性和时间可预测性

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306365

F. Herrera, P. Peñil, E. Villar

引用次数: 1

A special-purpose language for implementing pipelined FPGA-based accelerators 一种用于实现流水线式fpga加速器的专用语言

2015 Forum on Specification and Design Languages (FDL) Pub Date : 2015-11-12 DOI: 10.1109/FDL.2015.7306085

C. B. Oliveira, Ricardo Menotti, João MP Cardoso, E. Marques

{"title":"A special-purpose language for implementing pipelined FPGA-based accelerators","authors":"C. B. Oliveira, Ricardo Menotti, João MP Cardoso, E. Marques","doi":"10.1109/FDL.2015.7306085","DOIUrl":"https://doi.org/10.1109/FDL.2015.7306085","url":null,"abstract":"A common use for Field-Programmable Gate Arrays (FPGAs) is the implementation of hardware accelerators. A way of doing so is to specify the internal logic of such accelerators by using Hardware Description Languages (HDLs). However, HDLs rely on the expertise of developers and their knowledge about hardware development with FPGAs. Regarding this, efforts have been focused on developing High-level Synthesis (HLS) tools in an attempt to increase the overall abstraction level required for using FPGAs. However, the solutions presented by such tools are commonly considered inefficient in comparison to the ones achieved by a specialized hardware designer. An alternative solution to program FPGAs is the use of Domain- Specific Languages (DSLs), as they can provide higher abstraction levels than HDLs still allowing the developers to deal with specific issues leading to more efficient designs and not always covered by HLS tools. In this paper we present our recent work on a DSL named LALP (Language for Aggressive Loop Pipelining), which has been developed focusing on the development of FPGAbased, aggressively pipelined, hardware accelerators. We present the recent LALP extensions and the challenges we are facing regarding to the compilation of LALP to FPGAs.","PeriodicalId":171448,"journal":{"name":"2015 Forum on Specification and Design Languages (FDL)","volume":"26 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130414741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Clocks and Their Applications 时钟及其应用

2015 Forum on Specification and Design Languages (FDL) Pub Date : 1900-01-01 DOI: 10.1109/fdl.2015.7306364

K. Morin-Allory, Jean-Christophe Brignone, A. Pegatoquet, F. Fummi

引用次数: 0

FMI and SystemC-AMS

2015 Forum on Specification and Design Languages (FDL) Pub Date : 1900-01-01 DOI: 10.1109/fdl.2015.7306362

Michael Karner

引用次数: 0

Power aware modelling and design 电源感知建模和设计

2015 Forum on Specification and Design Languages (FDL) Pub Date : 1900-01-01 DOI: 10.1109/fdl.2015.7306091

Javier Moreno Molina

引用次数: 0