Clocks and Their Applications

Abstract

This session presents a new technique to verify synchronization protocols on RTL designs that automatically extract synchronizers from a flat design, and helkps to formally verify the correctness of the implemented synchronization protocol. It also present an approach to dynamically tune the time quantum in temporally decoupled simulations in order to improve the accuracy/performance tradeoff in virtual prototypes. Finally it presents an approach for the high level modeling of efficient power strategies in ESL design, which helps analyzing the effect of clock gating and frequency scaling by using a template that allows to integrate clock domains in SystemC-TLM simulations with power management support.