Y. Ohno, A. Ohsaki, T. Kaneoka, J. Mitsuhashi, M. Hirayama, T. Kato
{"title":"Effect of mechanical stress for thin SiO/sub 2/ films in TDDB and CCST characteristics","authors":"Y. Ohno, A. Ohsaki, T. Kaneoka, J. Mitsuhashi, M. Hirayama, T. Kato","doi":"10.1109/RELPHY.1989.36314","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36314","url":null,"abstract":"The effects of mechanical stress for thin SiO/sub 2/ films in TDDB (time-dependent dielectric breakdown) and CCST (constant-current stress test) are discussed. Compressive stress induced by a WSi/sub 2/ layer enhances generation of native traps induced by electron injection and degrades the CCST characteristics of MOS capacitors. In TDDB characteristics, the compressive stress decreases the intrinsic lifetime for thin SiO/sub 2/ films. The tensile stress induced by the plasma SiO layer does not degrade the CCST characteristics. The generation of interface states by electron injection is enhanced on the MOS capacitors by the tensile stress. The mechanical stress degrades the reliability of MOS capacitors with thin SiO/sub 2/ films.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132259689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Polarity dependence of thin oxide wearout","authors":"D. Dumin, K. J. Dickerson, M. Hall, G. Brown","doi":"10.1109/RELPHY.1989.36313","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36313","url":null,"abstract":"The properties of less than 10-nm-thick silicon oxide films have been measured as a function of substrate type, oxide thickness, stress polarity, stress voltage, geometry, and fluence to help define the physical processes involved in wearout and breakdown. Changes that have been observed in the I-V, I-t, and C-V characteristics of 10-nm-thick oxides on p-type substrates as a function of stress and measurement polarity are reported. The differences in trap generation and charge trapping that occur during and following the high-voltage stressing of thin oxides are discussed.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130141395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Internal ESD transients in input protection circuits","authors":"Y. Fong, C. Hu","doi":"10.1109/RELPHY.1989.36321","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36321","url":null,"abstract":"The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116395892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The electromigration damage response time and implications for DC and pulsed characterizations","authors":"J. Suehle, H. Schafft","doi":"10.1109/RELPHY.1989.36350","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36350","url":null,"abstract":"A measurement interference for highly accelerated electromigration stress tests is identified. Measurements of the median-time-to-failure, t/sub 50/ for DC and for pulsed current stress as a function of pulse repetition frequency, reveal that highly accelerated stress tests may overestimate metallization reliability if t/sub 50/ is comparable with the response time of the vacancy concentration. Techniques necessary to make reliable wafer-level t/sub 50/ measurements are described.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123030670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Duvvury, R. Rountree, H. Stiegler, T. Polgreen, D. Corum
{"title":"ESD phenomena in graded junction devices","authors":"C. Duvvury, R. Rountree, H. Stiegler, T. Polgreen, D. Corum","doi":"10.1109/RELPHY.1989.36320","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36320","url":null,"abstract":"The current very large-scale integration (VLSI) chips for sub-2- mu m processes use some form of graded junction devices for process reliability. Electrostatic discharge (ESD) performance for these graded junction processes is examined by studying the process variations. The results show that the ESD protection level can be optimized without significantly compromising the hot carrier reliability or the circuit drive current. The unique failure modes in these devices are also discussed. The results are supported by transient thermal analysis simulations.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"514 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116333362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Interface degradation and dielectric breakdown of thin oxides due to homogeneous charge injection","authors":"M. Kerber, U. Schwalke","doi":"10.1109/RELPHY.1989.36311","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36311","url":null,"abstract":"The interface stability of 9- to 20-nm gate oxides is evaluated during homogeneous charge injection. In addition, the question of the extent to which interface degradation is correlated to dielectric breakdown is addressed. The measurements reveal that thinner oxides are more resistant to interface degradation. In addition, significantly reduced charge trapping in thin oxides results in improved threshold voltage stability. For both gate polarities, oxide breakdown exhibits no direct correlation to interface state density.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131843587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Nikawa, K. Nasu, M. Murase, T. Kaito, T. Adachi, S. Inoue
{"title":"New applications of focused ion beam technique to failure analysis and process monitoring of VLSI","authors":"K. Nikawa, K. Nasu, M. Murase, T. Kaito, T. Adachi, S. Inoue","doi":"10.1109/RELPHY.1989.36316","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36316","url":null,"abstract":"The applications presented are: (1) microscopic selective cross-sectioning and in situ observation of the cross section; and (2) the observation of aluminum microstructure. These applications make failure analysis techniques simpler and less time-consuming.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132280924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"p-MOSFET gate current and device degradation","authors":"T. Ong, K. Seki, P. Ko, C. Hu","doi":"10.1109/RELPHY.1989.36341","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36341","url":null,"abstract":"Hot-carrier-limited device lifetime of surface-channel p-MOSFETs is found to correlate well with gate current over a wide range of bias. The same result is not observed for buried-channel p-MOSFETs. A gate current model for surface-channel p-MOSFETs is presented. Using this gate current model, reasonable estimates of AC stress lifetime can be made based on DC stress data.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126146746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Stress-driven diffusive voiding of aluminum conductor lines","authors":"F. Yost, D. E. Amos, A. D. Romig","doi":"10.1109/RELPHY.1989.36344","DOIUrl":"https://doi.org/10.1109/RELPHY.1989.36344","url":null,"abstract":"The trend to miniaturize silicon integrated circuits has brought with it a thermal stress-induced void formation problem in the aluminum conductor lines of these circuits. Here, local stress relaxation has been included quantitatively in the construction of a wedge-like void growth model. It is shown that under stress relaxation conditions, the stress-induced grain boundary diffusion equation transforms into the diffusion equation. With the use of appropriate boundary conditions and the initial conductor line stress profile, the diffusion equation is solved numerically. This solution yields the temporal history of void size and local stress. It is shown that two types of stress relaxation moderate and limit the growth of voids. From this analysis, a useful expression which relates final void size and initial stress is derived. With these results conservative estimates of the lifetime of aluminum conductor lines can be made.<<ETX>>","PeriodicalId":171192,"journal":{"name":"27th Annual Proceedings., International Reliability Physics Symposium","volume":"os-47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127785553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}