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2017 Panhellenic Conference on Electronics and Telecommunications (PACET)最新文献

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RBM-based hardware accelerator for handwritten digits recognition 基于rbm的手写数字识别硬件加速器
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259974
Nikolaos Toulgaridis, E. Bougioukou, T. Antonakopoulos
{"title":"RBM-based hardware accelerator for handwritten digits recognition","authors":"Nikolaos Toulgaridis, E. Bougioukou, T. Antonakopoulos","doi":"10.1109/PACET.2017.8259974","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259974","url":null,"abstract":"Automatic recognition of handwritten digits is a well known application area of neural networks. Efficient implementation of neural networks is not a trivial task and various architectures have been proposed for that purpose. This work presents the architecture and implementation of a hardware accelerator for fast recognition of hand-written digits based on Restricted Boltzmann machines. Fixed and floating point arithmetic is used for minimizing the required hardware resources. The proposed architecture results to a processing rate of more than 10 Mimages/sec in a single FPGA board.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122837901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Capacitive output filter effect on series-series inductive power transfer systems operating in asymmetric loading mode 非对称负载模式下串联电感电力传输系统的电容输出滤波效应
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259953
E. Gati, S. Manias
{"title":"Capacitive output filter effect on series-series inductive power transfer systems operating in asymmetric loading mode","authors":"E. Gati, S. Manias","doi":"10.1109/PACET.2017.8259953","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259953","url":null,"abstract":"In this work, the effect of a capacitive output filter in a series-series compensated inductive power transfer system, operating in asymmetric loading mode, is investigated. Asymmetric loading is performed by a half-cycle short-circuit / half-cycle loading operation, in the secondary side of the system. The aim is to reduce the value of the load resistance as reflected to the power supply, in order to increase the power intake from a given voltage source. Theoretical analysis shows that with the capacitive output filter, the output power can be up to four times the one achieved with the conventional full-wave rectification incorporating the same output filter. Simulations are carried out for a variety of resistive loads and frequencies of operation. Results show a significant increase in the output power, especially for high resistance loads, in comparison with the conventional full wave rectification.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114561583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Bridging Si3N4 waveguide and gold (Au) based hybrid plasmonic slot waveguide 桥接 Si3N4 波导和金（Au）基混合等离子槽波导
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259988
A. Manolis, D. Ketzaki, G. Dabos, D. Tsiokos, Nikos Pieros
{"title":"Bridging Si3N4 waveguide and gold (Au) based hybrid plasmonic slot waveguide","authors":"A. Manolis, D. Ketzaki, G. Dabos, D. Tsiokos, Nikos Pieros","doi":"10.1109/PACET.2017.8259988","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259988","url":null,"abstract":"In this work, we demonstrate a new directional coupling scheme for efficient light coupling between photonic Si3N4 and plasmonic Au-based metallic slot waveguides. The plasmonic-photonic hybrid waveguide structure is capable of supporting guided modes with even and odd symmetry. This feature can lead to the development of an efficient power exchange mechanism which can achieve power transmission per transition over 68% and coupling lengths of the order of just several microns.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126535811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Microring resonator design with application to performance improvement of optically or electrically modulated semiconductor optical amplifiers 微环谐振器设计及其在光或电调制半导体光放大器性能改进中的应用
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259960
Z. V. Rizou, K. Zoiros
{"title":"Microring resonator design with application to performance improvement of optically or electrically modulated semiconductor optical amplifiers","authors":"Z. V. Rizou, K. Zoiros","doi":"10.1109/PACET.2017.8259960","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259960","url":null,"abstract":"We propose to employ, through numerical simulations, a passive single-bus microring resonator (MRR) to suppress the pattern effect in an optically or electrically modulated semiconductor optical amplifier (SOA). The proposed scheme improves the quality of the amplified or encoded signal, respectively, while extending the SOA modulation rate in each case.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114763870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Chaotic synchronization in coupled neuronal circuits via a memristor 忆阻器耦合神经元电路中的混沌同步
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259949
D. Prousalis, C. Volos, I. Stouboulos, I. Kyprianidis, H. Nistazakis, G. Tombras
{"title":"Chaotic synchronization in coupled neuronal circuits via a memristor","authors":"D. Prousalis, C. Volos, I. Stouboulos, I. Kyprianidis, H. Nistazakis, G. Tombras","doi":"10.1109/PACET.2017.8259949","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259949","url":null,"abstract":"In this work, a coupling scheme of neuron models, in which a memristor has been used as an artificial synapse, is the subject of study. The proposed coupling systems are solved numerically by applying the fourth-order Runge-Kutta algorithm and various tools of nonlinear dynamics such as the phase portraits and time series have been used. As it will be presented in detail, the coupling neuronal systems show interesting dynamical behavior, such as chaotic synchronization.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116284564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Hardware emulation of phase change memory 相变存储器的硬件仿真
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259950
A. Petropoulos, T. Antonakopoulos
{"title":"Hardware emulation of phase change memory","authors":"A. Petropoulos, T. Antonakopoulos","doi":"10.1109/PACET.2017.8259950","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259950","url":null,"abstract":"Phase-change memory technology is emerging as a two-folded concept, as a universal non-volatile memory and in non-von Neumann computing systems. A major challenge concerning this technology is the reliable retrieval of the stored information, since noise and time-dependent resistance drift affect the initially stored value. Designing and experimenting with PCM technology at a large scale requires the development of a fast and accurate emulator that can be used in high performance computing systems for fast prototyping of new computing concepts. In this work, we present the basic unit of such a hardware emulator and the architecture of a tool that can be used to accurately emulate the memory characteristics.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122039626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design and implementation of quantum circuits for fault-tolerant architectures 用于容错架构的量子电路的设计与实现
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259984
Konstantinos Prousalis, Nikos Konofaos
{"title":"Design and implementation of quantum circuits for fault-tolerant architectures","authors":"Konstantinos Prousalis, Nikos Konofaos","doi":"10.1109/PACET.2017.8259984","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259984","url":null,"abstract":"The circuit model of quantum computation is the most common way to achieve a high-level representation of the computing evolution in a quantum computer. By using an already proposed software tool, the design and implementation processes are described for different architectures. The utility and potency of this tool is tested. Some representative examples are demonstrated to depict how it actually contributes to the implementation of a quantum circuit. Particular facilities may speedup the implementation process. A logic circuit's implementation can be automatically transformed into a fault-tolerant one by including the auxiliary encoding circuit overhead. Different design techniques are supported and recovery mechanisms can be included.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122167573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Single equivalent dipole inverse electrocardiography based on ordinary 12 leads recordings 基于普通12导联记录的单等效偶极逆心电图
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259962
A. Saliakoura, G. Theodosiadou, A. Rigas, G. Kyriacou, M. Zervakis
{"title":"Single equivalent dipole inverse electrocardiography based on ordinary 12 leads recordings","authors":"A. Saliakoura, G. Theodosiadou, A. Rigas, G. Kyriacou, M. Zervakis","doi":"10.1109/PACET.2017.8259962","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259962","url":null,"abstract":"The characterization of cardiac electric activity by equivalent electric sources including dipoles received a great research effort in the past. Recently these methods are revisited but exploiting a grid of multiple electrodes (up to 200), but these multi-lead electrodes are not widespread yet. Certainly, most hospitals and ordinary cardiology practice is still based on standard 12-lead ECG recordings. Exactly towards this aim is the effort put herein, hardly to exploit standard 12-lead ECG recordings to extract an equivalent electric dipole for the cardiac activity. Ultimately, this work aims at a trustworthy and very fast inverse ECG algorithm able to operate even with a simple standard ECG device available on an ambulance. This could contribute to early diagnosis as the type of heart malfunctioning during the patient transfer to the hospital.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"310 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132439864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An interference based dynamic channel access algorithm for dense WLAN deployments 一种基于干扰的密集无线局域网动态信道接入算法
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259972
A. Valkanis, Athanasios C. Iossifides, P. Chatzimisios
{"title":"An interference based dynamic channel access algorithm for dense WLAN deployments","authors":"A. Valkanis, Athanasios C. Iossifides, P. Chatzimisios","doi":"10.1109/PACET.2017.8259972","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259972","url":null,"abstract":"One of the major challenges that Wireless Local Area Networks (WLANs) are facing is to address dense scenarios, a case that is motivated by the continuous deployment of new Access Points (APs) to cover new areas and, thus, provide higher data rates. To address this challenge, which existing protocols cannot meet, the High-Efficiency WLAN (HEW) group is currently working on a new high throughput amendment named IEEE 802.11ax. In this paper, we introduce an Interference Based Dynamic Channel Access (IB-DCA) algorithm that enhances spatial reuse. We then evaluate our algorithm against the existing channel access algorithm as well as the Dynamic Sensitivity Control (DSC) and Adaptive Transmit Power Control (ATPC) algorithms that are proposed by the HEW group for various density WLAN scenarios.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131607030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Investigation of the construction of the phase shifter based on a 3-dB directional coupler 基于3db定向耦合器的移相器结构研究
2017 Panhellenic Conference on Electronics and Telecommunications (PACET) Pub Date : 2017-11-01 DOI: 10.1109/PACET.2017.8259991
D. Letavin, S. Shabunin
{"title":"Investigation of the construction of the phase shifter based on a 3-dB directional coupler","authors":"D. Letavin, S. Shabunin","doi":"10.1109/PACET.2017.8259991","DOIUrl":"https://doi.org/10.1109/PACET.2017.8259991","url":null,"abstract":"This paper deals with a new implementation of the design of a semiconductor phase shifter of the reflective type realized on the basis of a 3-dB directional coupler with a central operating frequency of 2000 MHz. Obtaining the necessary phase shifts at the output is realized by connecting additional microstrip segments using p-i-n-diodes. So, when connecting lengths λ/4, λ /8, λ /16, a phase change at the output of the phase shifter by 180°, 90° and 45° is obtained, respectively. The computer simulation of the phase shifter characteristics is performed in the AWR Design Environment program.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"42 20","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131608280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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