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ESSCIRC 80: 6th European Solid State Circuits Conference最新文献

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A 1000-Gate TTL-Compatible Masterslice Array 一种1000门ttl兼容主片阵列
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468738
E. Gonauser, W. Braeckelmann, K. Delker, K. Schoen, W. Wilhelm, A. Glasl
{"title":"A 1000-Gate TTL-Compatible Masterslice Array","authors":"E. Gonauser, W. Braeckelmann, K. Delker, K. Schoen, W. Wilhelm, A. Glasl","doi":"10.1109/ESSCIRC.1980.5468738","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468738","url":null,"abstract":"A 36.6 mm2 masterslice array with 58 fully TTL-compatible I/O-ports is described. The chip features 1ns internal gate delay, a power dissipation of 0.6 mW per gate and a single 5 V supply.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125318386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparison of Different Methods for the Simulation of SC-Filters sc滤波器仿真不同方法的比较
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468806
P. Christiansen, O. Manck
{"title":"Comparison of Different Methods for the Simulation of SC-Filters","authors":"P. Christiansen, O. Manck","doi":"10.1109/ESSCIRC.1980.5468806","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468806","url":null,"abstract":"Three different methods for the simulation of SC-filters are compared. The best results are obtained by using standard analog programs like SPICE<sup>1)</sup> and NAP2<sup>2)</sup>. No program changes are necessary.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116788832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hardware Design for an IEEE-488/1978 Interface Chip IEEE-488/1978接口芯片的硬件设计
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468791
L. Spaanenburg, G. Kaat, A. Kooy
{"title":"Hardware Design for an IEEE-488/1978 Interface Chip","authors":"L. Spaanenburg, G. Kaat, A. Kooy","doi":"10.1109/ESSCIRC.1980.5468791","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468791","url":null,"abstract":"A random-logic integrated realization of the IEEE-488/1978 standard interface is discussed. Techniques are shown to optimize the logic design as well as the testability.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115339757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance Comparison of MOS/LSI Analog and Digital Signal Processors MOS/LSI模拟与数字信号处理器的性能比较
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468803
B. Hosticka
{"title":"Performance Comparison of MOS/LSI Analog and Digital Signal Processors","authors":"B. Hosticka","doi":"10.1109/ESSCIRC.1980.5468803","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468803","url":null,"abstract":"Analog and digital signal processing are compared using hypothetical switched-capacitor analog and serial-parallel pipeline digital multipliers integrated in the same technology. It is shown that the analog multiplier has the same power-delay product as digital multipliers and can be thought of as a serial-serial digital multiplier.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127926798","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Micropower IC 微功率集成电路
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/esscirc.1980.5468768
E. Vittoz
{"title":"Micropower IC","authors":"E. Vittoz","doi":"10.1109/esscirc.1980.5468768","DOIUrl":"https://doi.org/10.1109/esscirc.1980.5468768","url":null,"abstract":"Various aspects of the realization of micropower LSI circuits are discussed, from the requirements on CMOS technologies to constraints on systems. Available passive and active devices are reviewed, with emphasis on DC, AC and noise characteristics of transistors at very low currents. Problems and solutions encountered in digital and analog circuits are illustrated with a few examples.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"209 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124699862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
An All-MOS Mixed Analog and Digital Circuit for Fire Detection 一种用于火灾探测的全mos混合模拟数字电路
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468783
D. Barbier, R. Poujois, J. Borel
{"title":"An All-MOS Mixed Analog and Digital Circuit for Fire Detection","authors":"D. Barbier, R. Poujois, J. Borel","doi":"10.1109/ESSCIRC.1980.5468783","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468783","url":null,"abstract":"MOS technology allows to make on the same chip analog and digital functions provided the analog functions can be realized in standard technology. This is the case for an all-MOS P channel Al gate fire detector chip where temperature rise or smoke density rise (signal from an ionization chamber) provide an alarm signal. Maximum values of these parameters are also detected. Self testing on chip is made for indicating a malfunctioning of the chip.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132144404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Gain Programmable Wideband Amplifier Subsystem 增益可编程宽带放大器子系统
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468786
M. Birch, E. Brown, J. S. Williams
{"title":"A Gain Programmable Wideband Amplifier Subsystem","authors":"M. Birch, E. Brown, J. S. Williams","doi":"10.1109/ESSCIRC.1980.5468786","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468786","url":null,"abstract":"A monolithic wideband amplifier (5 MHz to 200 MHz) is described which, in conjunction with a D to A, has been used to realise a subsystem with 48 dB of digital gain control.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130936800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CAL-MP: An advanced computer aided layout program for MOS-LSI 一个先进的计算机辅助布局程序，用于MOS-LSI
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468735
H. Beke, G. Patroons, W. Sansen
{"title":"CAL-MP: An advanced computer aided layout program for MOS-LSI","authors":"H. Beke, G. Patroons, W. Sansen","doi":"10.1109/ESSCIRC.1980.5468735","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468735","url":null,"abstract":"A new layout program for MOS-circuits is presented. The most important characteristics are the introduction of cells with pins on two sides such that less silicon area is required, and the possibility to define macro- cells, without impairing its capability to produce a layout with 100% routing.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134201017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 7th Order Unit Element Filter in VIS-SC Technique VIS-SC技术中的7阶单元元滤波器
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468805
D. Herbst, A. Fettweis, B. Hoefflinger, U. Kleine, W. Nientiedt, J. Pandel, R. Schweer
{"title":"A 7th Order Unit Element Filter in VIS-SC Technique","authors":"D. Herbst, A. Fettweis, B. Hoefflinger, U. Kleine, W. Nientiedt, J. Pandel, R. Schweer","doi":"10.1109/ESSCIRC.1980.5468805","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468805","url":null,"abstract":"The large parasitic capacitances of MOS capacitors to substrate usually degrades the performance of VIS-SC filters. It will be discussed, how the effect of such parasitics can be reduced by selection of a suitable set of network elements. Experimental results of a fully integrated 7th order low pass with only 4 op amps will be given.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132860464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Subscriber set and telematics 用户集和远程信息处理
ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI: 10.1109/ESSCIRC.1980.5468732
J. Picquendar
{"title":"Subscriber set and telematics","authors":"J. Picquendar","doi":"10.1109/ESSCIRC.1980.5468732","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468732","url":null,"abstract":"When the telematics gets started, the structure of the subscriber set has got to be reconsidered. However, two aspects should be retained The energy wasted and the other complications caused by microphone current (20 or 40 mA at 48 volts, i.e. 1,5 Watts dissipated in the carbon of microphone) can be avoided. This is possible by the use of piezoelectric microphone with an incorporated amplifier, which offers a more economical solution. The second yery useful objective to be attained is the possibility of doing analog-digital conversion and vice-versa alongwith the associated filteration operations in the subscribers' set itself, This way, the transmitted signals in bureautics and telematics would become digital signals. The resulting increase in the flow rate of lines could be useful in increasing the efficiency of different services. So that, the problem of realizing cheap \"MODEMS\" which is very difficult to solve, would dissapear.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132633793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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