Hardware Design for an IEEE-488/1978 Interface Chip

ESSCIRC 80: 6th European Solid State Circuits Conference Pub Date : 1980-09-01 DOI:10.1109/ESSCIRC.1980.5468791

L. Spaanenburg, G. Kaat, A. Kooy

引用次数: 0

Abstract

A random-logic integrated realization of the IEEE-488/1978 standard interface is discussed. Techniques are shown to optimize the logic design as well as the testability.

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IEEE-488/1978接口芯片的硬件设计

讨论了IEEE-488/1978标准接口的随机逻辑集成实现。给出了优化逻辑设计和可测试性的技术。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ESSCIRC 80: 6th European Solid State Circuits Conference

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