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Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)最新文献

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Power management solutions for computer systems and datacenters 用于计算机系统和数据中心的电源管理解决方案
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-11 DOI: 10.1145/1393921.1393956
K. Rajamani, C. Lefurgy, S. Ghiasi, J. Rubio, H. Hanson, T. Keller
{"title":"Power management solutions for computer systems and datacenters","authors":"K. Rajamani, C. Lefurgy, S. Ghiasi, J. Rubio, H. Hanson, T. Keller","doi":"10.1145/1393921.1393956","DOIUrl":"https://doi.org/10.1145/1393921.1393956","url":null,"abstract":"The growing power and cooling requirements of high-density computing systems pose significant challenges for the design and operation of computers and their facilities. The rising operating expenses for datacenters demand the implementation of energy-efficient technologies and the best power management solutions. This tutorial addresses power management and cooling solutions from the individual computer system level to the datacenter. The audience will learn about the fundamental nature of the problems, approaches to developing solutions, available commercial solutions, and current research directions.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124126575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
On the rules of low-power design (and how to break them) 关于低功耗设计的规则(以及如何打破它们)
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-11 DOI: 10.1145/1393921.1393926
T. Austin
{"title":"On the rules of low-power design (and how to break them)","authors":"T. Austin","doi":"10.1145/1393921.1393926","DOIUrl":"https://doi.org/10.1145/1393921.1393926","url":null,"abstract":"Energy and power constraints have emerged as one of the greatest lingering challenges to progress in the computing industry. In this talk, I will highlight some of the \"rules\" of low-power design and show how they bind the creativity and productivity of architects and designers. I believe the best way to deal with these rules is to disregard them, through innovative design solutions that abandon traditional design methodologies. Releasing oneself from these ties is not as hard as one might think. To support my case, I will highlight two rule-breaking design trends from my work and the work of others. The first trend combines low-power designs with resiliency mechanisms to craft highly introspective and efficient systems. The second trend embraces subthreshold voltage design, which holds great promise for highly energy efficient systems.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124344357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Power delivery for high performance microprocessors 高性能微处理器的电力输送
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-11 DOI: 10.1145/1393921.1393985
S. Balasubramanian
{"title":"Power delivery for high performance microprocessors","authors":"S. Balasubramanian","doi":"10.1145/1393921.1393985","DOIUrl":"https://doi.org/10.1145/1393921.1393985","url":null,"abstract":"Summary form only given. Robust power delivery is considered one the prime challenges in chip design today. As the frequency and complexity of microprocessors increase, the static and dynamic components of power supply noise increase. However, keeping with Moore's law, the voltage supply to semiconductor chips have been scaling down, thereby reducing margins. There are other challenges including efficiency and power dissipation of the power delivery sub system itself. This presentation will try to discuss these challenges and the solutions employed by the industry to over come of these. The talk will conclude with some discussion on future technologies to improve the overall efficiency of power delivery.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125265016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 42
Energy conservation by adaptive feature loading for mobile content-based image retrieval 基于移动内容图像检索的自适应特征加载节能
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-11 DOI: 10.1145/1393921.1393963
Karthik Kumar, Yamini Nimmagadda, Yu-Ju Hong, Yung-Hsiang Lu
{"title":"Energy conservation by adaptive feature loading for mobile content-based image retrieval","authors":"Karthik Kumar, Yamini Nimmagadda, Yu-Ju Hong, Yung-Hsiang Lu","doi":"10.1145/1393921.1393963","DOIUrl":"https://doi.org/10.1145/1393921.1393963","url":null,"abstract":"We present an adaptive loading scheme to save energy for content based image retrieval (CBIR) in a mobile system. In CBIR, images are represented and compared by high-dimensional vectors called features. Loading these features into memory and comparing them consumes a significant amount of energy. Our method adaptively reduces the features to be loaded into memory for each query image. The reduction is achieved by estimating the difficulty of the query and by reusing cached features in memory for subsequent queries. We implement our method on a PDA and obtain overall energy reduction of 61.3% compared with an existing CBIR implementation.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126861274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Power-efficient clustering via incomplete bypassing 通过不完全绕过实现节能集群
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-11 DOI: 10.1145/1393921.1394019
Eric P. Villasenor, Daeho Seo, Mithuna Thottethodi
{"title":"Power-efficient clustering via incomplete bypassing","authors":"Eric P. Villasenor, Daeho Seo, Mithuna Thottethodi","doi":"10.1145/1393921.1394019","DOIUrl":"https://doi.org/10.1145/1393921.1394019","url":null,"abstract":"Researchers have proposed clustered microarchitectures for performance and energy efficiency. Typically, clustered microarchitectures offer fast, local bypassing between instructions within clusters but global bypasses are slower. Traditional clustered microarchitectures (TCM) are implemented by partitioning the register file and associated functional units to clusters. This paper demonstrates an alternate implementation - Incomplete bypass-based clustered microarchitecture (IBCM). IBCM reduces the length of bypass wires by 42.4% resulting in an 8.9% reduction of \"Execute\" stage delay. This delay reduction in the critical EX stage enables voltage scaling that results in significantly lower average power consumption (between 11.7% and 19.5% lower) while achieving identical performance.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114954762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing 大规模离散双vt分配和连续栅极分级的并行随机化算法
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-08-01 DOI: 10.1145/1393921.1393937
Tai-Hsuan Wu, Lin Xie, A. Davoodi
{"title":"A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing","authors":"Tai-Hsuan Wu, Lin Xie, A. Davoodi","doi":"10.1145/1393921.1393937","DOIUrl":"https://doi.org/10.1145/1393921.1393937","url":null,"abstract":"We propose a parallel and randomized algorithm to solve the problem of discrete dual-Vt assignment combined with continuous gate sizing which is an important low power design technique in high performance domains. This combinatorial optimization problem is particularly difficult to solve on large-sized circuits. We first introduce a hybrid algorithm which combines the existing heuristics and convex formulations for this problem to achieve a better tradeoff between the runtime of the algorithm and the quality of generated solution. We then extend our algorithm to include parallelism and randomization. We introduce a unique utilization of parallelism to better identify the optimization direction. Consequently, we can reduce both the number of iterations in optimization as well as improve the quality of solution. We further use random sampling to avoid being trapped in local minima and to focus the optimization effort on the more \"promising\" regions of the solution space. Our algorithm improves the average power by 37% compared to an approach which is based on solving a continuous convex program and applying discretization. Power improvement is over 50% for larger benchmarks for an implementation on a grid of 9 computers.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127679131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers 两级运算放大器级联码补偿比米勒补偿的功率效率
Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) Pub Date : 2008-02-12 DOI: 10.1145/1393921.1393995
H. Aminzadeh, R. Lotfi
{"title":"On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers","authors":"H. Aminzadeh, R. Lotfi","doi":"10.1145/1393921.1393995","DOIUrl":"https://doi.org/10.1145/1393921.1393995","url":null,"abstract":"Optimization of power consumption is one of the main design challenges in today's low-power high-speed analog integrated circuits. In this paper, two popular techniques to stabilize two-stage operational amplifiers, namely Miller and cascode compensations are compared from power point of view. To accomplish this, the cascode-compensated structure is basically analyzed to derive the required equations for comparison. The results show that for the same specifications, cascode compensation is more power efficient than Miller compensation especially for heavy capacitive loads. This has been confirmed by circuit-level simulations in 0.25 μm CMOS technology.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124345907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
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