On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers

H. Aminzadeh, R. Lotfi
{"title":"On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers","authors":"H. Aminzadeh, R. Lotfi","doi":"10.1145/1393921.1393995","DOIUrl":null,"url":null,"abstract":"Optimization of power consumption is one of the main design challenges in today's low-power high-speed analog integrated circuits. In this paper, two popular techniques to stabilize two-stage operational amplifiers, namely Miller and cascode compensations are compared from power point of view. To accomplish this, the cascode-compensated structure is basically analyzed to derive the required equations for comparison. The results show that for the same specifications, cascode compensation is more power efficient than Miller compensation especially for heavy capacitive loads. This has been confirmed by circuit-level simulations in 0.25 μm CMOS technology.","PeriodicalId":166672,"journal":{"name":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-02-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1393921.1393995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21

Abstract

Optimization of power consumption is one of the main design challenges in today's low-power high-speed analog integrated circuits. In this paper, two popular techniques to stabilize two-stage operational amplifiers, namely Miller and cascode compensations are compared from power point of view. To accomplish this, the cascode-compensated structure is basically analyzed to derive the required equations for comparison. The results show that for the same specifications, cascode compensation is more power efficient than Miller compensation especially for heavy capacitive loads. This has been confirmed by circuit-level simulations in 0.25 μm CMOS technology.
两级运算放大器级联码补偿比米勒补偿的功率效率
功耗优化是当今低功耗高速模拟集成电路的主要设计挑战之一。本文从功率的角度比较了两种常用的稳定两级运算放大器的技术,即米勒补偿和级联补偿。为此,对级联码补偿结构进行了基本分析,推导出所需的方程进行比较。结果表明,对于相同的规格,级联码补偿比米勒补偿更节能,特别是对于大容性负载。这已经通过0.25 μm CMOS技术的电路级仿真得到了证实。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信