T. Ibuchi, Eisuke Masuda, T. Funaki, H. Otake, T. Miyazaki, Yasuo Kanetake, Takashi Nakamura
{"title":"A study on packaging design of SiC power module using near-field magnetic scanning techniques","authors":"T. Ibuchi, Eisuke Masuda, T. Funaki, H. Otake, T. Miyazaki, Yasuo Kanetake, Takashi Nakamura","doi":"10.1109/IWIPP.2017.7936770","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936770","url":null,"abstract":"This report focuses the current distribution in a module identifiedwith magnetic near-field intensity for optimizing layout and packaging design of silicon carbide (SiC) power module. This measurement methodology can visualize the practical current distribution on a wiring pattern in a module and can estimate the effect of snubber capacitor in a DC-link of half-bridge to suppress the voltage overshoot and ringing oscillation.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115527481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Technique for embedding current measurement and ringing suppression within multichip modules","authors":"A. Lemmon, A. Shahabi","doi":"10.1109/IWIPP.2017.7936766","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936766","url":null,"abstract":"This paper introduces a technique for adding two complementary features to power electronics circuits based on multi-chip power modules: high-bandwidth current measurement and ringing suppression. The design of the “CT-snubber” device, which can be viewed as an extension of the traditional current transformer, incorporates an additional filter network which can be tuned to mitigate the undesirable parasitic-induced ringing of the type commonly observed in wide band-gap applications during high-edge-rate switching transients. Preliminary empirical results from a prototype CT-snubber designed as part of this effort indicate that this concept is viable both as a current measurement apparatus, as well as a means for improving the transient response of power electronics applications. Further, it is believed that this type of circuit could be readily integrated into the housing of multi-chip modules, thereby simultaneously realizing improved dynamic performance and in-situ current sensing suitable for application control.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126761446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shuangfeng Zhang, E. Labouré, D. Labrousse, S. Lefebvre
{"title":"Thermal management for GaN power devices mounted on PCB substrates","authors":"Shuangfeng Zhang, E. Labouré, D. Labrousse, S. Lefebvre","doi":"10.1109/IWIPP.2017.7936752","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936752","url":null,"abstract":"This paper investigates different thermal management solutions for GaN HEMT mounted on Printed Circuit Board (PCB) substrates. Wide bandgap (WBG) power semiconductors like GaN devices have the ability to operate at high switching-frequency (from few 100 kHz to several MHz). To take advantage of their high frequency switching capabilities, the parasitic inductances of power connections as well as the connections between the dies and the gate driver must be minimized. So the majority of GaN chips available on the market are packaged so that they can be directly attached to a PCB. The embedding technology of GaN dies in PCB substrate is attractive because it offers various interconnection possibilities. However, the low thermal conductivity of glass epoxy will result in high thermal resistance of the substrate. So it is of the first importance to seek technological means in order to improve the cooling of GaN chips soldered or embedded in such PCB structures.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121395656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Epoxy/h-BN composites based on oriented boron nitride platelets with high thermally conductivity for electronic encapsulation","authors":"Zhengdong Wang, Jialiang Huang, Siyu Chen, Mengmeng Yang, Jingya Liu, Q. Xie, Yonghong Cheng","doi":"10.1109/IWIPP.2017.7936751","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936751","url":null,"abstract":"Owing to the miniaturization of power electronics and the development of portable and flexible devices, demands for highly thermally conductive, mechanically flexible, and electrically insulating composites have substantially increased. The high thermal conductivity of boron nitride (BN) platelets is expected to endow polymer composites with high thermal conductivity. Whilst BN is a typical two dimensional materials, which has anisotropic thermal conductivity. We have reported an remarkably increase in the in-plane thermal conductivity of the BN/epoxy composites through the fabrication of the horizontally aligned and densely packed BN in the epoxy matrix via a vacuum-assisted self-assembly technique. In addition, we compared the influence of the different BN particle sizes on the thermal conductivity of the composites. In this study, the range of BN particles sizes used are 5–8 μm, 15–20 μm and 25–30μm, respectively. The results indicated that the BN with lager size in matrix renders the composites high thermal conductivity at same content. The larger BN platelets can more easily form conductive chains of filler compared to the smaller filler particles. Meanwhile, the smaller filler particle can more easily scatter phonons suppressing heat transfer. It is clear that epoxy with aligned BN platelets has great promising for high thermal conductive insulating materials for the power microelectronics integrated in packaging.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"141 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114438214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Seal, Andrea K. Wallace, John E. Zumbro, H. Mantooth
{"title":"Thermo-mechanical reliability analysis of flip-chip bonded silicon carbide Schottky diodes","authors":"S. Seal, Andrea K. Wallace, John E. Zumbro, H. Mantooth","doi":"10.1109/IWIPP.2017.7936756","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936756","url":null,"abstract":"This paper presents the thermo-mechanical reliability analysis of a novel chip-scale wire bondless packaging technique for a SiC Schottky diode that leads to lower parasitics, higher reliability, lower costs, and lower losses. The proposed approach uses a flip-chip solder ball array to make connections to the anode. A copper connector was used to make contact with the bottom cathode, thus reconfiguring the bare die into a chip-scale, flip-chip capable device. Thermo-mechanical analysis in a finite element software showed that the proposed approach could better manage Coefficient of Thermal Expansion (CTE) mismatch stresses arising at the critical module interfaces as compared with a conventional wire bonded module. A detailed analysis of the flip-chip structure is presented and contrasted with a state-of-the-art wire bonded module. Different design parameters were explored for the drain connector to be able to make an optimized decision. However, keeping production costs low was prioritized without compromising significant performance. The fabrication process for manufacturing a flip-chip schottky diode module was also demonstrated along with preliminary test results to demonstrate functionality.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124243552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Stacked power module with integrated thermal management","authors":"L. Boteler, V. A. Niemann, D. Urciuoli, S. Miner","doi":"10.1109/IWIPP.2017.7936764","DOIUrl":"https://doi.org/10.1109/IWIPP.2017.7936764","url":null,"abstract":"Current power electronics devices are unable to realize their full capabilities due to the challenges of standard planar packaging including heat dissipation, reliability and parasitic inductance. This work aims to address all of these challenges simultaneously, thus creating a revolutionary approach to power packaging which significantly improves overall capability. The new approach stacks power devices between copper layers with an integrated heat sink. By stacking devices, the module is no longer constrained by the limitations of planar packaging; however it is limited by the ability to remove heat which is solved by integrating heat sinks directly in contact with both the top and bottom of each die. The key-enabling feature of this packaging approach is the multi-functional components (MFCs) which act as electrical, thermal and mechanical attachments concurrently. This co-designed approach aims to eliminate single function components such as wirebonds and heat sinks whose sole purpose is electrical conduction or heat removal, respectively, and replace them with MFCs. This work describes the fabrication of the module and also shows thermal, fluid, and mechanical modeling results. The modeling showed a total package thermal resistivity of 0.25 K-cm2/W. This new power module configuration has the potential to significantly reduce size, weight and cost while improving reliability and performance.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134063278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}