2008 IEEE International Symposium on Parallel and Distributed Processing最新文献_第9页

Component labeling for k-concave binary images using an FPGA 基于FPGA的k凹二值图像的分量标记

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536129

Yasuaki Ito, K. Nakano

引用次数: 3

Design and implementation of a tool for modeling and programming deadlock free meta-pipeline applications 设计和实现一个工具，用于建模和编程无死锁的元管道应用程序

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536121

S. Yamagiwa, L. Sousa

{"title":"Design and implementation of a tool for modeling and programming deadlock free meta-pipeline applications","authors":"S. Yamagiwa, L. Sousa","doi":"10.1109/IPDPS.2008.4536121","DOIUrl":"https://doi.org/10.1109/IPDPS.2008.4536121","url":null,"abstract":"The Caravela platform has been designed to develop a parallel and distributed stream-based computing paradigm, namely supported on the pipeline processing approach herein designated by meta-pipeline. This paper is focused on the design and implementation of a modeling tool for the meta-pipeline, namely to tackle the deadlock problem due to uninitialized input data stream in a pipeline-model. A new efficient algorithm is proposed to prevent deadlock situations by detecting uninitialized edges in a pipeline graph. The algorithm identifies the cyclic paths in a pipeline-graph and builds a reduced list with only the true cyclic paths that have to be really initialized. Further optimization techniques are also proposed to reduce the computation time and the required amount of memory. Moreover, this paper also presents a Graphical User Interface (GUI) for easy programming meta-pipeline applications, which provides an automatic validation procedure based on the proposed algorithm. Experimental results presented in this paper show the effectiveness of both the proposed algorithm and the developed GUI.","PeriodicalId":162608,"journal":{"name":"2008 IEEE International Symposium on Parallel and Distributed Processing","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126853190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A dynamic scheduling approach for coordinated wide-area data transfers using GridFTP 基于GridFTP的协调广域数据传输的动态调度方法

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536325

Gaurav Khanna, Ümit V. Çatalyürek, T. Kurç, R. Kettimuthu, P. Sadayappan, J. Saltz

引用次数: 28

A rapid prototyping environment for high-speed reconfigurable analog signal processing 用于高速可重构模拟信号处理的快速原型环境

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536511

J. Becker, F. Henrici, S. Trendelenburg, Y. Manoli

引用次数: 7

Runtime adaptive multi-processor system-on-chip: RAMPSoC 运行时自适应多处理器片上系统

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/ICSAMOS.2010.5642043

D. Göhringer, M. Hübner, Laure Hugot-Derville, J. Becker

引用次数: 75

Low power/area branch prediction using complementary branch predictors 使用互补支路预测器进行低功耗/面积支路预测

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536323

Resit Sendag, J. Yi, Peng-fei Chuang, D. Lilja

{"title":"Low power/area branch prediction using complementary branch predictors","authors":"Resit Sendag, J. Yi, Peng-fei Chuang, D. Lilja","doi":"10.1109/IPDPS.2008.4536323","DOIUrl":"https://doi.org/10.1109/IPDPS.2008.4536323","url":null,"abstract":"Although high branch prediction accuracy is necessary for high performance, it typically comes at the cost of larger predictor tables and/or more complex prediction algorithms. Unfortunately, large predictor tables and complex algorithms require more chip area and have higher power consumption, which precludes their use in embedded processors. As an alternative to large, complex branch predictors, in this paper, we investigate adding complementary branch predictors (CBP) to embedded processors to reduce their power consumption and/or improve their branch prediction accuracy. A CBP differs from a conventional branch predictor in that it focuses only on frequently mispredicted branches while letting the conventional branch predictor predict the more predictable ones. Our results show that adding a small 16-entry (28 byte) CBP reduces the branch misprediction rate of static, bimodal, and gshare branch predictors by an average of 51.0%, 42.5%, and 39.8%, respectively, across 38 SPEC 2000 and MiBench benchmarks. Furthermore, a 256-entry CBP improves the energy-efficiency of the branch predictor and processor up to 97.8% and 23.6%, respectively. Finally, in addition to being very energy-efficient, a CBP can also improve the processor performance and, due to its simplicity, can be easily added to the pipeline of any processor.","PeriodicalId":162608,"journal":{"name":"2008 IEEE International Symposium on Parallel and Distributed Processing","volume":"57 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114124054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

A neocortex model implementation on reconfigurable logic with streaming memory 基于流存储器的可重构逻辑的新皮层模型实现

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536533

Christopher N. Vutsinas, T. Taha, Kenneth L. Rice

引用次数: 6

Adaptive B-Greedy (ABG): A simple yet efficient scheduling algorithm 自适应b -贪婪(ABG):一种简单而高效的调度算法

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536546

Hongyang Sun, W. Hsu

{"title":"Adaptive B-Greedy (ABG): A simple yet efficient scheduling algorithm","authors":"Hongyang Sun, W. Hsu","doi":"10.1109/IPDPS.2008.4536546","DOIUrl":"https://doi.org/10.1109/IPDPS.2008.4536546","url":null,"abstract":"In order to improve processor utilizations on parallel systems, adaptive scheduling with parallelism feedback was recently proposed. A-Greedy, an existing adaptive scheduler, offers provably-good job execution time and processor utilization. Unfortunately, it suffers from unstable feedback and hence unnecessary processor reallocations even when the job has constant parallelism. This problem may cause difficulties in the management of system resources. We propose a new adaptive scheduler called ABG (for Adaptive B-Greedy), which ensures both performance and stability. In a direct comparison with A-Greedy using simulated data- parallel jobs, ABG shows an average 50% reduction in wasted processor cycles and an average 20% improvement in running time. For a set of jobs, ABG also outperforms A-Greedy by 10% to 15% on average in terms of both makespan and mean response time, provided the system is not heavily loaded. Our detailed analysis shows that ABG indeed offers improved transient and steady-state behaviors in terms of control-theoretic metrics. Using trim analysis, we show that ABG provides nearly linear speedup for individual jobs and good processor utilizations. Using competitive analysis, we also show that ABG offers good makespan and mean response time bounds.","PeriodicalId":162608,"journal":{"name":"2008 IEEE International Symposium on Parallel and Distributed Processing","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125212083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Defining a simple metric for real-time security level evaluation of multi-sites networks 为多站点网络的实时安全级别评估定义了一个简单的度量

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536562

Abdoul Karim Ganame, J. Bourgeois

引用次数: 10

A parallel insular model for location areas planning in mobile networks 移动网络中定位区域规划的平行孤岛模型

2008 IEEE International Symposium on Parallel and Distributed Processing Pub Date : 2008-04-14 DOI: 10.1109/IPDPS.2008.4536367

Laidi Foughali, E. Talbi, M. Batouche

引用次数: 4