2014 19th IEEE European Test Symposium (ETS)最新文献_第6页

Secure and efficient LBIST for feedback shift register-based cryptographic systems 基于反馈移位寄存器的密码系统安全高效的LBIST

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847821

E. Dubrova, M. Näslund, G. Selander

{"title":"Secure and efficient LBIST for feedback shift register-based cryptographic systems","authors":"E. Dubrova, M. Näslund, G. Selander","doi":"10.1109/ETS.2014.6847821","DOIUrl":"https://doi.org/10.1109/ETS.2014.6847821","url":null,"abstract":"Cryptographic methods are used to protect confidential information against unauthorised modification or disclo-sure. Cryptographic algorithms providing high assurance exist, e.g. AES. However, many open problems related to assuring security of a hardware implementation of a cryptographic algorithm remain. Security of a hardware implementation can be compromised by a random fault or a deliberate attack. The traditional testing methods are good at detecting random faults, but they do not provide adequate protection against malicious alterations of a circuit known as hardware Trojans. For example, a recent attack on Intel's Ivy Bridge processor demonstrated that the traditional Logic Built-In Self-Test (LBIST) may fail even the simple case of stuck-at fault type of Trojans. In this paper, we present a novel LBIST method for Feedback Shift Register (FSR)-based cryptographic systems which can detect such Trojans. The specific properties of FSR-based cryptographic systems allow us to reach 100% single stuck-at fault coverage with a small set of deterministic tests. The test execution time of the proposed method is at least two orders of magnitude shorter than the one of the pseudo-random pattern-based LBIST. Our results enable an efficient protection of FSR-based cryptographic systems from random and malicious stuck-at faults.","PeriodicalId":145416,"journal":{"name":"2014 19th IEEE European Test Symposium (ETS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127090130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Detection conditions for errors in self-adaptive better-than-worst-case designs 自适应优于最坏情况设计中误差的检测条件

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847794

I. Polian, Jie Jiang, A. Singh

引用次数: 5

Avoiding burnt probe tips: Practical solutions for testing internally regulated power supplies 避免烧探针提示:测试内部稳压电源的实用解决方案

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847810

R. Swanson, Anna Wong, S. Ethirajan, Amitava Majumdar

引用次数: 2

Analysis and mitigation of single event effects on flash-based FPGAS 基于闪存的fpga单事件效应分析与缓解

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847804

L. Sterpone, B. Du

引用次数: 11

Two soft-error mitigation techniques for functional units of DSP processors DSP处理器功能单元的两种软误差缓解技术

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847792

Alireza Rohani, H. Kerkhoff

引用次数: 1

On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial) 过程变异性和老化对新兴存储器可靠性的影响(嵌入式教程)

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847813

Marco Indaco, P. Prinetto, E. Vatajelu

{"title":"On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial)","authors":"Marco Indaco, P. Prinetto, E. Vatajelu","doi":"10.1109/ETS.2014.6847813","DOIUrl":"https://doi.org/10.1109/ETS.2014.6847813","url":null,"abstract":"Due to the rapid development of smartphones, notebooks and tablets, the need for high density, low power, high performance SoCs has pushed the well-established embedded memory technologies to their limits. To overcome the existing memory issues, emerging memory technologies are being developed and implemented. The focus is placed on non-volatile technologies., which should meet the high demands of tomorrow applications. The emerging technologies are expected to integrate the best features of SRAMs, DRAMs, and Flash memories at the same time. That includes high performance and high density similar to SRAMs and DRAMs respectively, non-volatility, good endurance features, good integration, low power profile, resistance to radiation effects, and ability to scale below 20 nm. The emerging memory technologies being studied today are the magnetic type RAM, the resistive type RAM and the Phase-change RAM. However, since these are new technologies., their modeling is still controversial and their shortcomings not completely cha-racterized. In the paper we present a methodology for memory reliability estimation when process variability and aging phenomena are accounted for at physical level. The method relies on a highly parameterized physical description of emerging memory technologies, based on which, a complete characterization of the memory technology is performed, and the resulting issues of the fabricated cell identified.","PeriodicalId":145416,"journal":{"name":"2014 19th IEEE European Test Symposium (ETS)","volume":"355 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122762526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Verification of the decimal floating-point square root operation 验证小数浮点平方根运算

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847842

Amr A. R. Sayed-Ahmed, H. Fahmy, U. Kühne

引用次数: 3

Test-mode-only scan attack using the boundary scan chain 使用边界扫描链的测试模式扫描攻击

2014 19th IEEE European Test Symposium (ETS) Pub Date : 2014-05-26 DOI: 10.1109/ETS.2014.6847798

Subidh Ali, O. Sinanoglu, R. Karri

引用次数: 24