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2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers最新文献

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20 GHz integrated CMOS frequency sources with a quadrature VCO using transformers 20 GHz集成CMOS频率源与使用变压器的正交压控振荡器
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320593
Sangsoo Ko, Jeong‐Geun Kim, Taeksang Song, E. Yoon, Songcheol Hong
{"title":"20 GHz integrated CMOS frequency sources with a quadrature VCO using transformers","authors":"Sangsoo Ko, Jeong‐Geun Kim, Taeksang Song, E. Yoon, Songcheol Hong","doi":"10.1109/RFIC.2004.1320593","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320593","url":null,"abstract":"A fully integrated 20 GHz frequency source is implemented with a VCO and a doubler in a 0.18 /spl mu/m CMOS process. A 10 GHz quadrature voltage controlled oscillator (QVCO) is implemented using a transformer-coupled resonator. The VCO can be tuned between 10.2 and 11.4 GHz and has low phase noise of -118.67 dBc/Hz at 1 MHz offset frequency with 1.8 V power supply. The figure of merit (FOM) is 188 dB. The 20 GHz differential signal is generated by harmonics of quadrature signals of the VCO with a balanced frequency doubler. To increase the output power of the harmonics, pinch-off clipping is used without any buffers or DC level shifter, since the proposed VCO has RF signals with low DC level. The frequency multiplier, the output of which can be tuned between 19.8 and 22 GHz, has a low noise of - 111.67 dBc/Hz at 1 MHz offset frequency. The phase noise of the multiplier is 7 dB higher than that of the VCO. The output power is -6.83 dBm and the VCO output power is -6 dBm.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131508497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 59
Comparison of contemporary CMOS ring oscillators 当代CMOS环形振荡器的比较
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320596
Dean A. Badillol, S. Kiaei, E. Elliot
{"title":"Comparison of contemporary CMOS ring oscillators","authors":"Dean A. Badillol, S. Kiaei, E. Elliot","doi":"10.1109/RFIC.2004.1320596","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320596","url":null,"abstract":"This work presents measured data and analysis, accurately comparing three, four-stage ring oscillators. The delay cell topologies considered here include the linear source coupled, and two saturating types. Each oscillator is fabricated concurrently in a 1.8 V, 0.18 /spl mu/m CMOS process and is characterized for phase noise, power consumption and tuning range.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131006455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
A 0.6V 1.6mW transformer based 2.5GHz downconversion mixer with +5.4dB gain and -2.8dBm IIP3 in 0.13/spl mu/m CMOS 基于0.6V 1.6mW变压器的2.5GHz下变频混频器，增益+5.4dB, IIP3为-2.8dBm，采用0.13/spl mu/m CMOS
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320518
C. Hermann, M. Tiebout, H. Klar
{"title":"A 0.6V 1.6mW transformer based 2.5GHz downconversion mixer with +5.4dB gain and -2.8dBm IIP3 in 0.13/spl mu/m CMOS","authors":"C. Hermann, M. Tiebout, H. Klar","doi":"10.1109/RFIC.2004.1320518","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320518","url":null,"abstract":"An on-chip transformer in current gain and resonant mode has been employed in a downconversion mixer. Part of the overall gain of the mixer has been shifted from the RF input stage to the transformer. Thus the power consumption has been reduced, and, in spite of the low supply voltage, moderate linearity has been achieved. The downconversion mixer has been realized in 0.13 /spl mu/m CMOS. It consumes 1.6 mW from a 0.6. V supply. A gain of 5.4 dB, an IIP3 of -2.8 dBm, an input 1 dB compression point of -9.2 dBm, and a SSB noise figure of 14.8 dB have been achieved.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"59 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132530777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
5.3 GHz 1.6 dB NF CMOS low noise amplifier using 0.11 /spl mu/m technology 5.3 GHz 1.6 dB NF CMOS低噪声放大器，采用0.11 /spl mu/m技术
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320541
H. Satou, H. Yamazaki, K. Kobayashi, T. Mori, Y. Watanabe
{"title":"5.3 GHz 1.6 dB NF CMOS low noise amplifier using 0.11 /spl mu/m technology","authors":"H. Satou, H. Yamazaki, K. Kobayashi, T. Mori, Y. Watanabe","doi":"10.1109/RFIC.2004.1320541","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320541","url":null,"abstract":"We fabricated a low noise amplifier (LNA) for a 5 GHz WLAN with a supply voltage of 1.2 V using 0.11 /spl mu/m CMOS technology. Low voltage design is crucial for an analog circuit to use the scaled digital CMOS. Employing the cascode amplifier configuration, we have shown that the LNA has a wide operating margin even at the supply voltage of 1.2 V. The measured LNA revealed an NF of 1.6 dB, a power consumption of 12.5 mW and 8.2 dBm of OIP3 at 5.3 GHz with a supply voltage of 1.2 V.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"165 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133698161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A highly-integrated inductor-less SiGe W-CDMA transmitter 一种高集成度无电感SiGe W-CDMA发射机
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320646
Horng-Yuan Shih, Peng-Un Su, Yen-Horng Chen, Tz-Heng Fu, Jen-Lung Liu, K. Juang, M. Kuo, Chun-Ming Hsu
{"title":"A highly-integrated inductor-less SiGe W-CDMA transmitter","authors":"Horng-Yuan Shih, Peng-Un Su, Yen-Horng Chen, Tz-Heng Fu, Jen-Lung Liu, K. Juang, M. Kuo, Chun-Ming Hsu","doi":"10.1109/RFIC.2004.1320646","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320646","url":null,"abstract":"A highly-integrated W-CDMA transmitter, which consists of an IQ modulator, an intermediate frequency variable gain amplifier, an up-conversion mixer and a radio frequency variable gain amplifier is presented. All functional blocks in the transmitter are inductor-less, significantly reducing the size of the chip of the transmitter. The measured gain control range exceeded 80 dB and the gain control resolution is 1 dB, meeting the requirements of the W-CDMA system. The measured maximum output power is -2.5 dBm. As the output power varies from -82.5 dBm to 2.5 dBm, the current consumption of the transmitter IC varies from 44 mA to 88 mA. The measured error vector magnitude (EVM) is 1.86% at maximum output power.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129482295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Overcome the phase noise optimization limit of differential LC oscillator with asymmetric capacitance tank structure [CMOS RFIC] 克服非对称电容槽结构差分LC振荡器相位噪声优化极限[CMOS RFIC]
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320688
Choong-Yul Cha, Sang-Gug Lee
{"title":"Overcome the phase noise optimization limit of differential LC oscillator with asymmetric capacitance tank structure [CMOS RFIC]","authors":"Choong-Yul Cha, Sang-Gug Lee","doi":"10.1109/RFIC.2004.1320688","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320688","url":null,"abstract":"A phase noise optimization method, with an asymmetric capacitance tank structure, is proposed, which overcomes the shortcomings of the previous tank L/C ratio optimization approach. The proposed phase noise optimization method, with asymmetric capacitance tank structure, can be applied to the complementary Colpitts (c-Colpitts) oscillator. The phase noise characteristics of the c-Colpitts explain well the excellence of an asymmetric tank structure, and the phase noise properties are proved by simulation and experiment. Moreover, a differentially coupled c-Colpitts oscillator topology is proposed, which can achieve a better phase noise performance than that of the conventional differential LC oscillator.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114175862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 5.2 GHz image rejection CMOS low noise amplifier for WLAN applications 一种用于WLAN应用的5.2 GHz图像抑制CMOS低噪声放大器
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320569
T.K. Nguyen, Nam-Jin Oh, Hyung-Chul Choi, Kuk-Ju Ihm, Sang-Gug Lee
{"title":"A 5.2 GHz image rejection CMOS low noise amplifier for WLAN applications","authors":"T.K. Nguyen, Nam-Jin Oh, Hyung-Chul Choi, Kuk-Ju Ihm, Sang-Gug Lee","doi":"10.1109/RFIC.2004.1320569","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320569","url":null,"abstract":"This paper represents a low noise, high gain image rejection low noise amplifier (IR-LNA) used in the superheterodyne architecture. The proposed IR-LNA is implemented by integrating the low noise, high gain LNA with the proposed third order active notch filter, which is optimized for 5.25 GHz WLAN with IF frequency of 500 MHz applications. The measurement results show power gain of 20.5 dB, lower than 1.5 dB NF, and image rejection of 26 dB. Two-tone test results indicate -5 dBm and -8 dBm of IIP3 for the case of using and not using the notch filter, respectively. The proposed IR-LNA operates at supply voltage of 3 V, and dissipates 4 mA in 0.18 /spl mu/m CMOS technology.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129471260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Integration of triple-band GSM antenna switch module using SOI CMOS 基于SOI CMOS的三频段GSM天线交换模块集成
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320670
James Bonkowski, Dylan Kelly
{"title":"Integration of triple-band GSM antenna switch module using SOI CMOS","authors":"James Bonkowski, Dylan Kelly","doi":"10.1109/RFIC.2004.1320670","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320670","url":null,"abstract":"An integrated triple-band GSM antenna switch module, fabricated in RF CMOS on a sapphire substrate, is presented in this paper. The low cost and compact size requirements in wireless and mobile communication systems motivate the continuing integration of the analog portions of the design. The antenna switch die incorporates a FET switch, transmit path filters, and all bias and control circuitry on the same substrate using a 0.5 /spl mu/m CMOS process. A revised version of the die is also proposed, which makes use of an additional copper interconnect layer to reduce die area.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128407532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
A high-efficiency SiGe BiCMOS WCDMA power amplifier with dynamic current biasing for improved average efficiency 一种具有动态电流偏置的高效SiGe BiCMOS WCDMA功率放大器，可提高平均效率
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320622
J. Deng, P. Gudem, L. Larson, P. Asbeck
{"title":"A high-efficiency SiGe BiCMOS WCDMA power amplifier with dynamic current biasing for improved average efficiency","authors":"J. Deng, P. Gudem, L. Larson, P. Asbeck","doi":"10.1109/RFIC.2004.1320622","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320622","url":null,"abstract":"This paper demonstrates a WCDMA single-stage power amplifier, fabricated in a 0.25 /spl mu/m SiGe BiCMOS process. With dynamic biasing of the collector current, the average power efficiency is improved by more than a factor of two compared to a typical class AB power amplifier. The power amplifier satisfies the 3GPP class-III WCDMA adjacent channel power ratio (ACPR) specifications (ACPR_5M= -33 dBc and ACPR_10M = -58.8 dBc) with 23.9 dBm average channel output power. The measured output power at the 1 dB compression point is 25.9 dBm.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128807289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
CMOS K-band LNAs design counting both interconnect transmission line and RF pad parasitics 计算互连传输线和射频垫寄生的CMOS k波段LNAs设计
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers Pub Date : 2004-06-06 DOI: 10.1109/RFIC.2004.1320539
Kyung-Wan Yu, M. Chang
{"title":"CMOS K-band LNAs design counting both interconnect transmission line and RF pad parasitics","authors":"Kyung-Wan Yu, M. Chang","doi":"10.1109/RFIC.2004.1320539","DOIUrl":"https://doi.org/10.1109/RFIC.2004.1320539","url":null,"abstract":"We have successfully demonstrated K-band low-noise amplifiers (LNAs) in 0.18 /spl mu/m standard CMOS process and validated their performance at the specified frequencies of 24 GHz and 26 GHz. The impact of the interconnect line and RF pad parasitics on the frequency characteristics is investigated. The measured LNA performance agrees well with the simulated one, as the parasitic effects are well taken into account. The 24 GHz LNA obtains a 12.9 dB gain and a 5.6 dB noise figure (NF). The 26 GHz LNA achieves an. 8.9 dB gain with a 6.9 dB NF. The input referred third-order intercept point (IIP3) is measured to be higher than +2 dBm for both LNAs. Each LNA consumes 30 mA of DC current from a 1.8 V power supply.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128812270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
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