2014 IEEE Dallas Circuits and Systems Conference (DCAS)最新文献

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Low frequency CMOS sinusoidal oscillator for impedance spectroscopy 用于阻抗谱的低频CMOS正弦振荡器
2014 IEEE Dallas Circuits and Systems Conference (DCAS) Pub Date : 2014-11-21 DOI: 10.1109/DCAS.2014.6965342
Nagaraja Revanna, T. R. Viswanathan
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引用次数: 5
Enabling the Internet of Things: Reconfigurable power amplifier techniques using intelligent algorithms and the smith tube 实现物联网:使用智能算法和史密斯管的可重构功率放大器技术
2014 IEEE Dallas Circuits and Systems Conference (DCAS) Pub Date : 2014-10-01 DOI: 10.1109/DCAS.2014.6965341
C. Baylis, Matthew Fellows, Matthew Flachsbart, J. Barlow, Joseph Barkate, R. Marks
{"title":"Enabling the Internet of Things: Reconfigurable power amplifier techniques using intelligent algorithms and the smith tube","authors":"C. Baylis, Matthew Fellows, Matthew Flachsbart, J. Barlow, Joseph Barkate, R. Marks","doi":"10.1109/DCAS.2014.6965341","DOIUrl":"https://doi.org/10.1109/DCAS.2014.6965341","url":null,"abstract":"Future Internet of Things (IoT) devices will need to maintain high power efficiency while being able to reconfigure for changing performance requirements and operating frequencies. The design of quickly reconfigurable power amplifiers able to maintain high efficiency and meet spectral requirements will be critical to success. This paper discusses fast optimization techniques that will be useful in real-time optimization of transmitter power amplifiers: (1) a vector-based algorithm to find the load impedance giving the highest power-added efficiency (PAE) while keeping the adjacent-channel power ratio (ACPR) below a prespecified minimum, (2) the use of a spectral mask directly in the load-pull optimization in place of the ACPR, and (3) the extension of the Smith Chart to a three-dimensional, cylindrical “Smith Tube” for optimization involving an additional parameter: the waveform bandwidth. This paper builds a framework for design and the real-time optimization of reconfigurable, efficient, and spectrally compliant IoT power amplifiers.","PeriodicalId":138665,"journal":{"name":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127026420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A bias-shared direct downconversion receiver front-end with flicker noise minimization 具有闪烁噪声最小化的偏置共享直接下变频接收机前端
2014 IEEE Dallas Circuits and Systems Conference (DCAS) Pub Date : 1900-01-01 DOI: 10.1109/DCAS.2014.6965348
Wei-Gi Ho, R. Gharpurey
{"title":"A bias-shared direct downconversion receiver front-end with flicker noise minimization","authors":"Wei-Gi Ho, R. Gharpurey","doi":"10.1109/DCAS.2014.6965348","DOIUrl":"https://doi.org/10.1109/DCAS.2014.6965348","url":null,"abstract":"A direct downconversion receiver front-end that employs current-mode passive mixers is described. Bias-sharing is employed between the RF transconductor and a baseband transimpedance amplifier (TIA). Flicker noise of the RF transconductor is mitigated by chopping the RF signal, which is made possible by employing phase-domain orthogonality between RF and baseband signals. A noise shaping network that suppresses the TIA thermal noise from around the frequency of the local oscillator is investigated. Simulations in a 0.13μm CMOS process show 35 dB conversion gain, 4.9 dB NF, and in-band 1dB compression point of -26 dBm. The noise reduction techniques improve the flicker noise corner from 1 MHz to 11 kHz, and the noise figure beyond the flicker corner from 5.8 dB to 4.9 dB. The design consumes 3.8 mA from 1.2 V supply.","PeriodicalId":138665,"journal":{"name":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128799121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Integer-N digital PLL using ADC-based phase detector 整数n数字锁相环采用基于adc的鉴相器
2014 IEEE Dallas Circuits and Systems Conference (DCAS) Pub Date : 1900-01-01 DOI: 10.1109/DCAS.2014.6965325
M. Ensafdaran, Pratheep Bondalapati, W. Namgoong
{"title":"Integer-N digital PLL using ADC-based phase detector","authors":"M. Ensafdaran, Pratheep Bondalapati, W. Namgoong","doi":"10.1109/DCAS.2014.6965325","DOIUrl":"https://doi.org/10.1109/DCAS.2014.6965325","url":null,"abstract":"Phase-to-digital converter (PDC) is a critical building block in digital phase-locked loops (DPLL). To improve its phase noise performance, an integer-N DPLL that employs an analog-to-digital converter (ADC) to digitize the phase error is presented. Compared to the conventional time-to-digital converter (TDC), the proposed ADC-based PDC with the same number of bits can be shown to reduce the quantization noise contribution to the DPLL output jitter variance by more than an order of magnitude. Design examples are presented to verify the functionality and performance of the proposed approach.","PeriodicalId":138665,"journal":{"name":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122595508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Packing list 装箱单
2014 IEEE Dallas Circuits and Systems Conference (DCAS) Pub Date : 1900-01-01 DOI: 10.1109/dcas.2014.6965316
Ford Bronco
{"title":"Packing list","authors":"Ford Bronco","doi":"10.1109/dcas.2014.6965316","DOIUrl":"https://doi.org/10.1109/dcas.2014.6965316","url":null,"abstract":"· Computers (laptop or desktop) · Curling/Hair Irons (required auto-o feature) · Sealed Unit Co ee Makers (e.g., KeurigTM, co ee makers without exposed heating elements) · Electric Razors · UL-Approved Fans · Fish Tanks (10 gallons or smaller) · Portable Hair Dryers · UL-Approved Indoor Holiday Lights (1 strand per electrical outlet – light strands cannot be connected) · UL-Approved Surge Protector (with on/o switch and internal overcurrent protection) · Microwave (700 watts max) · Energy Star certi ed mini or compact refrigerators up to 4.3 cubic feet or Non-Energy Star certi ed mini or compact refrigerators limited to 3.3 cubic feet or smaller (operate at 118 volts, 60 Hz or less and draw no more than 1.5 amps or 180 watts of power) · Bicycles · Kitchen Utensils, excluding kitchen non-table knives · Live potted plants · Non-Electrical Bed Risers less than 8 inches PROHIBITED PROPERTY","PeriodicalId":138665,"journal":{"name":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131498915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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