发布求助
文献互助 智能选刊 最新文献

IEEE Journal of Solid-state Circuits最新文献

筛选
英文 中文
Energy Efficient Monolithically Integrated 256 Gb/s Optical Transmitter With Autonomous Wavelength Stabilization in 45 nm CMOS SOI 具有自主波长稳定的45nm CMOS SOI节能单片集成256gb /s光发射机
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI: 10.1109/jssc.2024.3511673
Kaisarbek Omirzakhov, Han Hao, Ali Pirmoradi, Firooz Aflatouni
{"title":"Energy Efficient Monolithically Integrated 256 Gb/s Optical Transmitter With Autonomous Wavelength Stabilization in 45 nm CMOS SOI","authors":"Kaisarbek Omirzakhov, Han Hao, Ali Pirmoradi, Firooz Aflatouni","doi":"10.1109/jssc.2024.3511673","DOIUrl":"https://doi.org/10.1109/jssc.2024.3511673","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"38 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142840995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Single-Duty-Cycled Buck–Boost Converter Achieving Low Output Ripple and Seamless Mode Transition 实现低输出纹波和无缝模式转换的单占空比降压-升压转换器
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI: 10.1109/jssc.2024.3515100
Jae-Hyun Kim, Yousung Park, Doyoung Kwon, Dae-Hyeon Kim, Dong-Kyu Kim, Sung-Chun Park, Yongjae Lee, Jung-Bong Lee, Hyun-Sik Kim
{"title":"A Single-Duty-Cycled Buck–Boost Converter Achieving Low Output Ripple and Seamless Mode Transition","authors":"Jae-Hyun Kim, Yousung Park, Doyoung Kwon, Dae-Hyeon Kim, Dong-Kyu Kim, Sung-Chun Park, Yongjae Lee, Jung-Bong Lee, Hyun-Sik Kim","doi":"10.1109/jssc.2024.3515100","DOIUrl":"https://doi.org/10.1109/jssc.2024.3515100","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"17 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142840998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Harmonic-Mixer-Based Fractional-N PLL Employing Voltage-Domain Feed-Forward Noise Cancellation 基于谐波混频器的电压域前馈噪声消除分数n锁相环
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI: 10.1109/jssc.2024.3516139
Haoming Zhang, Masaru Osada, Yuyang Zhu, Tetsuya Iizuka
{"title":"A Harmonic-Mixer-Based Fractional-N PLL Employing Voltage-Domain Feed-Forward Noise Cancellation","authors":"Haoming Zhang, Masaru Osada, Yuyang Zhu, Tetsuya Iizuka","doi":"10.1109/jssc.2024.3516139","DOIUrl":"https://doi.org/10.1109/jssc.2024.3516139","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"92 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142840996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A W-Band TX/RX Chipset With 2.4-GHz LO Synchronization Enabling Full Scalability for FMCW Radar 具有 2.4 GHz LO 同步功能的 W 波段 TX/RX 芯片组，可实现 FMCW 雷达的全面可扩展性
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI: 10.1109/jssc.2024.3514667
Jingzhi Zhang, Sherif S. Ahmed, Amin Arbabian
{"title":"A W-Band TX/RX Chipset With 2.4-GHz LO Synchronization Enabling Full Scalability for FMCW Radar","authors":"Jingzhi Zhang, Sherif S. Ahmed, Amin Arbabian","doi":"10.1109/jssc.2024.3514667","DOIUrl":"https://doi.org/10.1109/jssc.2024.3514667","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"64 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142840997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.38-mW 200-kHz-BW Digital-Intensive Single-Opamp Fourth-Order Continuous-Time Delta-Sigma Modulator With Third-Order Digital Noise Coupling in 28-nm CMOS 含三阶数字噪声耦合的0.38 mw 200 khz - bw数字密集型单运放四阶连续δ - σ调制器
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI: 10.1109/jssc.2024.3513442
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
{"title":"A 0.38-mW 200-kHz-BW Digital-Intensive Single-Opamp Fourth-Order Continuous-Time Delta-Sigma Modulator With Third-Order Digital Noise Coupling in 28-nm CMOS","authors":"Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu","doi":"10.1109/jssc.2024.3513442","DOIUrl":"https://doi.org/10.1109/jssc.2024.3513442","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"23 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142840999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Fully Row/Column-Parallel MRAM In-Memory Computing Macro With Memory-Resistance Boosting and Weighted Multi-Column ADC Readout 具有内存阻抗提升和加权多列 ADC 读出功能的全行/列并行 MRAM 内存计算宏程序
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-16 DOI: 10.1109/jssc.2024.3512360
Peter Deaville, Bonan Zhang, Naveen Verma
{"title":"A Fully Row/Column-Parallel MRAM In-Memory Computing Macro With Memory-Resistance Boosting and Weighted Multi-Column ADC Readout","authors":"Peter Deaville, Bonan Zhang, Naveen Verma","doi":"10.1109/jssc.2024.3512360","DOIUrl":"https://doi.org/10.1109/jssc.2024.3512360","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"76 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142831884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor for IoT Devices SESOMP：面向物联网设备的可扩展高能效自组织地图处理器
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-12 DOI: 10.1109/jssc.2024.3510877
Yuncheng Lu, Xin Zhang, Bo Wang, Tony Tae-Hyoung Kim
{"title":"SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor for IoT Devices","authors":"Yuncheng Lu, Xin Zhang, Bo Wang, Tony Tae-Hyoung Kim","doi":"10.1109/jssc.2024.3510877","DOIUrl":"https://doi.org/10.1109/jssc.2024.3510877","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"30 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142815721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture 一种3nm - finfet 4.3 GHz 21.1 Mb/mm双泵浦1读1写伪2端口SRAM，具有折叠位线多银行架构
IF 4.6 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-12 DOI: 10.1109/JSSC.2024.3509958
Masaru Haraguchi;Yorinobu Fujino;Yoshisato Yokoyama;Ming-Hung Chang;Yu-Hao Hsu;Hong-Chen Cheng;Koji Nii;Yih Wang;Tsung-Yung Jonathan Chang
{"title":"A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture","authors":"Masaru Haraguchi;Yorinobu Fujino;Yoshisato Yokoyama;Ming-Hung Chang;Yu-Hao Hsu;Hong-Chen Cheng;Koji Nii;Yih Wang;Tsung-Yung Jonathan Chang","doi":"10.1109/JSSC.2024.3509958","DOIUrl":"10.1109/JSSC.2024.3509958","url":null,"abstract":"A double-pumped 1-read and 1-write pseudo-2-port 6T static random access memory (SRAM) with folded bitline (BL) multi-bank (MB) architecture is demonstrated on 3 nm FinFET technology. A new self-timed clock generator is proposed to optimize wordline (WL) negating with shortcut path circuit (WLNS). sense-amplifier-enable interlocking (SAEI) circuit and the clock generator can provide a 3.6% increase in the maximum operating frequency (<inline-formula> <tex-math>$f_{text {MAX}}$ </tex-math></inline-formula>) by minimizing the tail period of the read operation. The data pre-loading write driver (PLWD) circuit facilitates a shorter separation time between read and write operations by overlapping BL pre-charge and write data loading on the BL, thereby leading to a 4.4% improvement in <inline-formula> <tex-math>$f_{text {MAX}}$ </tex-math></inline-formula>. The WLNS and PLWD contribute to 2.4% <inline-formula> <tex-math>$f_{text {MAX}}$ </tex-math></inline-formula> gain by promoting contention-free features between the BL pre-charge and write driver circuits. Furthermore, the real-time dynamic performance scaling (RTDPS) feature ensures a robust SRAM read/write operation across the entire supply voltage range by optimizing WL pulsewidth. The test chip measurement results show that it achieves a 5.9% increase in <inline-formula> <tex-math>$f_{text {MAX}}$ </tex-math></inline-formula> at high voltage ranges. In addition, the memory density is 21.1 Mb/mm2, and <inline-formula> <tex-math>$f_{text {MAX}}$ </tex-math></inline-formula> is 4.3 GHz, resulting in a figure of merit (FoM) of 90.7 GHz <inline-formula> <tex-math>$times $ </tex-math></inline-formula> Mb/mm2/V.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 1","pages":"197-204"},"PeriodicalIF":4.6,"publicationDate":"2024-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142815720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Class-G Impedance-Modulation Multi-Core Power Oscillator for High $P_{text{out}}$ and Power Back-Off Efficiency Enhancement 用于高P_{text{out}}$和增强功率回退效率的g类阻抗调制多核功率振荡器
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-12 DOI: 10.1109/jssc.2024.3510417
Yiyang Shu, Xun Luo
{"title":"Class-G Impedance-Modulation Multi-Core Power Oscillator for High $P_{text{out}}$ and Power Back-Off Efficiency Enhancement","authors":"Yiyang Shu, Xun Luo","doi":"10.1109/jssc.2024.3510417","DOIUrl":"https://doi.org/10.1109/jssc.2024.3510417","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"4 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142815719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 78.2-dB Dynamic Range Shunt-Based Current Sensor for BLDC Motor Control With 2.75-$mu$s Conversion Time and 0.4-mm2 Active Area 一种用于无刷直流电机控制的78.2 db动态范围分流电流传感器，转换时间为2.75-$mu$s，有效面积为0.4 mm2
IF 5.4 1区 工程技术
IEEE Journal of Solid-state Circuits Pub Date : 2024-12-11 DOI: 10.1109/jssc.2024.3510926
Antonio Aprile, Jaya Satyanarayana Yarragunta, Andreas Fugger, Francesco Conzatti, Edoardo Bonizzoni, Piero Malcovati
{"title":"A 78.2-dB Dynamic Range Shunt-Based Current Sensor for BLDC Motor Control With 2.75-$mu$s Conversion Time and 0.4-mm2 Active Area","authors":"Antonio Aprile, Jaya Satyanarayana Yarragunta, Andreas Fugger, Francesco Conzatti, Edoardo Bonizzoni, Piero Malcovati","doi":"10.1109/jssc.2024.3510926","DOIUrl":"https://doi.org/10.1109/jssc.2024.3510926","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"28 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142809324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信