Hwaseok Shin, Yoonjae Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Junseob So, Seon-Been Lee, Taehwan Kim, Chulwoo Kim
{"title":"A 15-Gb/s PAM-3 Transceiver With Hybrid Equalization and Time-Domain Decoder for High-Bandwidth-Memory Interfaces","authors":"Hwaseok Shin, Yoonjae Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Junseob So, Seon-Been Lee, Taehwan Kim, Chulwoo Kim","doi":"10.1109/jssc.2025.3557795","DOIUrl":"https://doi.org/10.1109/jssc.2025.3557795","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"22 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143841223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jee-Ho Park, Ji-Hyoung Cha, Yongjae Park, Seong-Jin Kim
{"title":"A Compact Photocurrent Recording IC With High-Linearity Dual PWM Buffered R-DACs","authors":"Jee-Ho Park, Ji-Hyoung Cha, Yongjae Park, Seong-Jin Kim","doi":"10.1109/jssc.2025.3558937","DOIUrl":"https://doi.org/10.1109/jssc.2025.3558937","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"122 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143841171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HUNBN, a 16-nm Digital In-Memory-Compute SoC for Edge CNN Application Achieving 24 TOPs/W (4b) at System Level","authors":"Weijie Jiang;Cédric Caron;Prabhat Avasare;Marc Pauwels;Marian Verhelst;Wim Dehaene","doi":"10.1109/JSSC.2025.3557967","DOIUrl":"10.1109/JSSC.2025.3557967","url":null,"abstract":"This work presents HUNBN, a fully digital in-memory-compute (DIMC) system-on-chip (SoC) implemented using 16-nm FinFET CMOS technology. Designed for edge convolution neural network (CNN) applications, the DIMC-based architecture enhances energy efficiency by significantly reducing the energy associated with static random access memory (SRAM). At the macro level, three key techniques are employed to optimize energy and area efficiency: 1) the adoption of a foundry-pushed rule 6T bit-cell array; 2) a split MAC workflow; and 3) synchronous DIMC operation. At the system level, the data movement is tailored to efficiently support both CNN and transposed CNN layers. The proposed design achieves 126 TOPS/W (4-bit MAC) at the macro level and 24 TOPS/W at the system level, while offering a memory density of 508 kB/mm2 and a compute density of 1.27 K MAC units/mm2. This enables a highly energy-efficient, scalable platform for edge CNN applications.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 7","pages":"2434-2446"},"PeriodicalIF":4.6,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143841224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo
{"title":"C-Transformer: An Energy-Efficient Homogeneous DNN-Transformer/SNN-Transformer Processor for Large Language Models","authors":"Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo","doi":"10.1109/jssc.2025.3554699","DOIUrl":"https://doi.org/10.1109/jssc.2025.3554699","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"2 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2025-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143836676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}