2020 23rd Euromicro Conference on Digital System Design (DSD)最新文献_第8页

Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition Systems 低功耗微型二值神经网络在人体识别系统中的应用

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00057

Antonio De Vita, D. Pau, L. D. Benedetto, A. Rubino, F. Pétrot, G. Licciardo

{"title":"Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition Systems","authors":"Antonio De Vita, D. Pau, L. D. Benedetto, A. Rubino, F. Pétrot, G. Licciardo","doi":"10.1109/DSD51259.2020.00057","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00057","url":null,"abstract":"Human Activity Recognition requires very high accuracy to be effectively employed into practical applications, ranging from elderly care to microsurgical devices. The highest accuracies are achieved by Deep Learning models, but these are not easily deployable in handheld or wearable devices with very constrained resources. We therefore present a new HAR system suitable for a compact FPGA implementation. A new Binarized Neural Network (BNN) architecture achieves the classification based on data from a single tri-axial accelerometer. From our experiments, the effect of gravity and the unknown orientation of the sensor cause a degradation of the accuracy. In order to compensate for these issues, we propose a HW-friendly algorithm to pre-process the raw acceleration signal. Moreover, the very low power and hardware friendly BNN has been trained and validated on the PAMAP2 dataset, for which the pre-processing operations increase the accuracy from 51% to 99% in the best case. Aiming for a low-power design, we designed both a custom circuit to perform the pre-processing operations and a hardware accelerator for the BNN. The design on FPGA features a power dissipation of 72 mW and occupies 6788 LUTs.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115114822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

Revisiting Explicit Enumeration for Exact Synthesis 再论精确综合的显式枚举

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00016

Gianluca Martino, Heinz Riener, G. Fey

引用次数: 0

Design of Radiation Hardened RADFET Readout System for Space Applications 用于空间应用的抗辐射RADFET读出系统设计

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00082

M. Andjelković, A. Simevski, Junchao Chen, O. Schrape, Z. Stamenkovic, M. Krstic, S. Ilić, L. Spahic, Laza Kostic, G. Ristić, A. Jaksic, A. Palma, A. Lallena, Miguel Angel Carvaja

引用次数: 1

Data Footprint Reduction in DNN Inference by Sensitivity-Controlled Approximations with Online Arithmetic 基于在线算法的灵敏度控制逼近减少DNN推理中的数据占用

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00089

Abdus Sami Hassan, Tooba Arifeen, Jeong-A Lee

{"title":"Data Footprint Reduction in DNN Inference by Sensitivity-Controlled Approximations with Online Arithmetic","authors":"Abdus Sami Hassan, Tooba Arifeen, Jeong-A Lee","doi":"10.1109/DSD51259.2020.00089","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00089","url":null,"abstract":"In deep neural network (DNN) inference, researchers have been trying to reduce the number of computations and connections without performance degradation, departing from a bit-parallel to a bit-serial mode of arithmetic. In this regard, approximations translated as the mixed-precision profile for among-layer-mixed-precision through bit-serial architecture have been adopted in the literature. However, the introduction of within-layer mixed precision through controlled approximations for low-latency DNN architecture is yet to be studied. For DNN inference in this study, we apply an unconventional computation technique of online arithmetic, which serially generates the most significant digits first(MSDF) and then terminates computation according to the required precision. Specifically, Taylor expansion-based sensitivity analysis guides the within-layer-mixed-precision method for the choice of approximation intensity (desired bits) for weights and activations of convolutional layers. In turn, the within-layer-mixed-precision method drives the termination of the convolution operation carried out using an online multiplier. Hence, we aim to reduce the data footprint by early terminations achieved thanks to the insightful nature of within-layer-mixed-precision instead of among-layer-mixedprecision for online convolution. In this manner, convolution operations compute not-more-than-necessary most significant digits to overcome the bottleneck of data footprint for in-demand edge computing devices.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123540622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective 医疗物联网设备面向安全的设计框架:硬件安全视角

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00056

Konstantinos Nomikos, Athanasios Papadimitriou, G. Stergiopoulos, D. Koutras, M. Psarakis, P. Kotzanikolaou

{"title":"On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective","authors":"Konstantinos Nomikos, Athanasios Papadimitriou, G. Stergiopoulos, D. Koutras, M. Psarakis, P. Kotzanikolaou","doi":"10.1109/DSD51259.2020.00056","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00056","url":null,"abstract":"As medical devices more and more use Internet of Things based technologies, serious concerns are raised about their security and the privacy of patient’s personal health data. To address these concerns, while maintaining reasonable overheads, designers of medical devices need to take security into account from the beginning until the completion of their designs. In this work we identify the relevant security domains and focus to the Hardware Security perspective. Additionally, we present a secure design and evaluation framework which can assist designers towards more secure medical devices. The framework integrates a complete insulin pump architecture containing all the basic components used in such applications. To illustrate the advantages of the proposed framework we perform a Side Channel Analysis attack against the embedded encryption algorithm of the device to obtain the secret encryption key. Then, we make use of the framework to identify all the components of the system which are either directly or indirectly affected by the attack. This analysis leads us to determine more complex combined attacks which may complement the SCA attack into compromising the overall security of the system.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117176018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

An Hardware Recurrent Neural Network for Wearable Devices 用于可穿戴设备的硬件递归神经网络

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00055

E. Torti, Claudia d’Amato, G. Danese, F. Leporati

{"title":"An Hardware Recurrent Neural Network for Wearable Devices","authors":"E. Torti, Claudia d’Amato, G. Danese, F. Leporati","doi":"10.1109/DSD51259.2020.00055","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00055","url":null,"abstract":"Automatic classification of time series signals acquired by wearable or portable devices covers a central role in many critical healthcare applications, such as heart rate monitoring [1], sleep apnea study [2], gait analysis [3] and fall detection [4]. In recent years, many approaches have been adopted, including a wide range of methods ranging from threshold-based algorithms to Deep Learning techniques. The threshold-based methods have the advantage of being simple and not heavy from a computational point of view, but at the cost of low accuracy. Deep Learning approaches ensure a higher precision, but the computational complexity is increased. This is a critical issue for wearable devices because a high computational complexity strongly affects the processing time and the battery life. In this paper, we propose a hardware architecture for time series analysis using Recurrent Neural Networks (RNNs) exploiting FPGA technology. The architecture is validated with three-axial accelerometer data acquired by a wearable device used for automatic fall detection. The experimental results show that the proposed architecture outperforms state of the art solutions both in terms of processing time and power consumption.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121536476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Menhir: Generic High-Speed FPGA Model-Checker Menhir:通用高速FPGA模型检查器

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00022

Emilien Fournier, C. Teodorov, Loïc Lagadec

引用次数: 1

AxBy: Approximate Computation Bypass for Data-Intensive Applications AxBy:数据密集型应用的近似计算旁路

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00061

Dongning Ma, Xun Jiao

{"title":"AxBy: Approximate Computation Bypass for Data-Intensive Applications","authors":"Dongning Ma, Xun Jiao","doi":"10.1109/DSD51259.2020.00061","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00061","url":null,"abstract":"Recent years have witnessed a rapid growth of data-intensive applications such as machine learning and multimedia applications. However, such applications incur a heavy computation workload that stresses the existing computing systems, especially resource-constrained embedded systems. This paper is inspired by the key observation that many data-intensive applications naturally present a strong existence of trivial computations – a set of computations the results of which can be determined without actual computations. Typical examples include multiplication with 0, +1/-1 and addition with 0. Correspondingly, we develop and implement bypass circuits that are tightly integrated with computation units to detect and bypass the trivial computations. Once detected, the circuit delivers the pre-determined result without an actual computation. We implement bypass circuits in both hardware (Verilog) and software (C). Furthermore, we enhance the opportunities of computation bypass by developing AxBy, an approximate computation bypass method with pattern matching under limited data precision. This reconfigurability is key to achieving a “controllable approximation” and a tunable quality-energy tradeoff. Our experimental results show that for four image processing applications and three neural network applications, the computation bypass can enable 15% – 55% in image processing and 30% – 35% in neural networks of energy saving without any accuracy loss. For neural networks, we can further achieve 36% –44% energy saving with negligible accuracy loss.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129475944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Strengthening Post-Quantum Security for Automotive Systems 加强汽车系统的后量子安全

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00094

Tim Fritzmann, Jonas Vith, Martha Johanna Sepúlveda

{"title":"Strengthening Post-Quantum Security for Automotive Systems","authors":"Tim Fritzmann, Jonas Vith, Martha Johanna Sepúlveda","doi":"10.1109/DSD51259.2020.00094","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00094","url":null,"abstract":"The long lifecycle of automotive products demands that not only current but also future threats are considered during the design of automotive security. Therefore, the foreseeable breakthrough of quantum computers represents a risk for the automotive industry and the integration of Post-Quantum Cryptography (PQC) gets necessary. Lattice-based PQC is an attractive alternative for securing automotive systems. It usually employs Error-Correcting Codes (ECC) to increase the security level and to decrease the failure rate. However, ECCs are vulnerable to timing attacks. To this end, we present in this work three contributions. First, we present an implementation of PQC tailor-made for a microcontroller used in automotive systems. Second, we integrate a more powerful ECC into ThreeBears, which is an efficient Post-Quantum scheme, in order to improve its security level and to decrease the failure rate. Finally, we implement a protected ECC implementation able to resist timing attacks. Results show that the integration of PQC in automotive environments is feasible and that optimization techniques can lead to a 55.98% performance improvement. Moreover, our ECC exploration achieves a failure rate decrease from 2−135 to 2−153. Alternatively, an increase of the security level from 2141 to 2144 can be achieved. Furthermore, the timing-protected ECC presents in total only a minor performance overhead.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131602714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

DSD 2020 Opinion DSD 2020意见

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/dsd51259.2020.00010

引用次数: 0