低功耗微型二值神经网络在人体识别系统中的应用

Antonio De Vita, D. Pau, L. D. Benedetto, A. Rubino, F. Pétrot, G. Licciardo
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引用次数: 14

摘要

人体活动识别需要非常高的准确性才能有效地应用于实际应用,从老年护理到显微外科设备。深度学习模型可以实现最高的精度,但这些模型不容易部署在资源非常有限的手持或可穿戴设备中。因此,我们提出了一种适合于紧凑FPGA实现的新型HAR系统。一种新的二值化神经网络(BNN)架构实现了基于单个三轴加速度计数据的分类。从我们的实验来看,重力的影响和未知的传感器方向会导致精度的下降。为了弥补这些问题,我们提出了一种hw友好的算法来预处理原始加速信号。此外,非常低功耗和硬件友好的BNN已经在PAMAP2数据集上进行了训练和验证,在最佳情况下,预处理操作将准确率从51%提高到99%。为了实现低功耗设计,我们设计了一个定制电路来执行预处理操作,并为BNN设计了一个硬件加速器。基于FPGA的设计功耗为72 mW,占用6788 lut。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition Systems
Human Activity Recognition requires very high accuracy to be effectively employed into practical applications, ranging from elderly care to microsurgical devices. The highest accuracies are achieved by Deep Learning models, but these are not easily deployable in handheld or wearable devices with very constrained resources. We therefore present a new HAR system suitable for a compact FPGA implementation. A new Binarized Neural Network (BNN) architecture achieves the classification based on data from a single tri-axial accelerometer. From our experiments, the effect of gravity and the unknown orientation of the sensor cause a degradation of the accuracy. In order to compensate for these issues, we propose a HW-friendly algorithm to pre-process the raw acceleration signal. Moreover, the very low power and hardware friendly BNN has been trained and validated on the PAMAP2 dataset, for which the pre-processing operations increase the accuracy from 51% to 99% in the best case. Aiming for a low-power design, we designed both a custom circuit to perform the pre-processing operations and a hardware accelerator for the BNN. The design on FPGA features a power dissipation of 72 mW and occupies 6788 LUTs.
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