2020 23rd Euromicro Conference on Digital System Design (DSD)最新文献

DSD 2020 Commentary DSD 2020评论

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/dsd51259.2020.00011

引用次数: 0

SHeD: A Framework for Automatic Software Synthesis of Heterogeneous Dataflow Process Networks 异构数据流过程网络的自动软件合成框架

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00012

Omair Rafique, K. Schneider

{"title":"SHeD: A Framework for Automatic Software Synthesis of Heterogeneous Dataflow Process Networks","authors":"Omair Rafique, K. Schneider","doi":"10.1109/DSD51259.2020.00012","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00012","url":null,"abstract":"A dataflow process network (DPN) is a system of concurrent processes which communicate with each other through statically determined and buffered point-to-point connections. While the general model of computation (MoC) does not impose further restrictions, many different subclasses of DPNs have been considered over time like Kahn process networks, cyclo-static networks and synchronous dataflow networks. These classes differ in the kinds of behaviors of the processes that are precisely described based on how each process is triggered for an execution, and based on how each execution of a process consumes/produces data. A heterogeneous combination of particular kinds of processes can be effectively used to model different components of a system with different kinds of MoCs. Such a composition of dataflow processes within a network is termed as heterogeneous DPN. There are design tools for modeling like Ptolemy and FERAL that support different MoCs including particular classes of DPNs by the use of so-called directors. However, design tools for synthesis are usually restricted to the weakest classes of DPNs, i.e., cyclo-static and synchronous DPNs. In this paper, we present an extendable model-based design framework called SHeD for automatic -software synthesis of heterogeneous -DPNs. SHeD supports different kinds of DPN processes and therefore also different kinds of MoCs. To this end, SHeD proposes a general DPN model that is used with specific definitions and constraints to formulate the precise classes of DPNs. Also, it provides a tool chain, including different specialized code generators for specific MoCs, and a runtime system that finally maps models using a combination of different MoCs on the target hardware. We demonstrate the effective use of SHeD by a case study of a distributed automotive research platform.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122618432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA 基于FPGA的32位双管道超标量RISC-V处理器设计

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00062

T. Gokulan, Akshay Muraleedharan, Kuruvilla Varghese

引用次数: 2

RISC-V Extension for Lightweight Cryptography 轻量级加密的RISC-V扩展

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00045

Etienne Tehrani, T. Graba, Abdelmalek Si-Merabet, J. Danger

{"title":"RISC-V Extension for Lightweight Cryptography","authors":"Etienne Tehrani, T. Graba, Abdelmalek Si-Merabet, J. Danger","doi":"10.1109/DSD51259.2020.00045","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00045","url":null,"abstract":"Lightweight Cryptography (LWC) is suitable for IoTs which require a high level of security while keeping a low complexity. Many lightweight cryptographic algorithms have been proposed to satisfy these requirements. But there is currently no emerging standard concerning the symmetric block ciphering, as every algorithm has its own advantage. For instance one can be optimized for low latency, another one for low complexity but requires more rounds to be cryptographically secure to the detriment of throughput. Hence, a processor able to cope with all the algorithms should be ideal to provide agility, performance and security while keeping an affordable complexity. We present in this paper a specific execution unit of the RISC-V processor which is able to run the most common lightweight 64-bit block ciphers. The gain in performance can reach over a hundred compared to the reference architecture. The acceleration takes advantage of five specific instructions which can easily be adapted to the execution unit of a VexRiscv architecture. The complexity can double when implementing the new execution unit, but provide a high degree of agility and performance when executing most of lightweight cryptographic implementations.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122139269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Quantitative and Qualitative Evaluation Methods of Automotive Time of Flight Based Sensors 基于汽车飞行时间传感器的定量和定性评价方法

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00106

Caterina Nahler, C. Steger, N. Druml

{"title":"Quantitative and Qualitative Evaluation Methods of Automotive Time of Flight Based Sensors","authors":"Caterina Nahler, C. Steger, N. Druml","doi":"10.1109/DSD51259.2020.00106","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00106","url":null,"abstract":"Time of Flight (ToF) based three-dimensional (3D) imaging sensors, such as Light Detection and Ranging (LiDAR) sensors or ToF cameras, can be used to depict their surroundings in form of a point cloud. The ToF method measures the time an emitted light signal takes to be reflected by a point in space and derives the distance from the known travel time of light. More and more ToF based 3D sensors are developed for automotive use as their target application. Automotive sensors are part of a safety critical application. Therefore, it is important to ensure that the provided sensor data is accurate with a known probability. In this paper, we describe and evaluate test procedures for quantitative and qualitative performance evaluation of ToF/LiDAR sensors with focus on automotive use. We propose a LiDAR error and influence model from which we derived eight test areas. We described and conducted tests for six of the eight test areas. The described test cases were evaluated on three LiDAR sensors and one ToF camera. The results show that targets and test procedures need to be adapted to the specific tested ToF/LiDAR sensor. Especially noticeable where influences on test procedures due sparse sensor resolution. Furthermore, the test results show that target application specific tests can provide additional information on the behaviour of the sensor.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117297853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Challenges and Opportunities of IoT and AI in Pneumology 物联网和人工智能在肺炎领域的挑战与机遇

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00054

M. Mongelli, V. Orani, E. Cambiaso, I. Vaccari, A. Paglialonga, F. Braido, C. Catalano

{"title":"Challenges and Opportunities of IoT and AI in Pneumology","authors":"M. Mongelli, V. Orani, E. Cambiaso, I. Vaccari, A. Paglialonga, F. Braido, C. Catalano","doi":"10.1109/DSD51259.2020.00054","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00054","url":null,"abstract":"The objective of this work is the design of a technological platform for remote monitoring of patients with Chronic Obstructive Pulmonary Disease (COPD). The concept of the framework is a breakthrough in the state of medical, scientific and technological art, aimed at engaging patients in the treatment plan and supporting interaction with healthcare professionals. The proposed platform is able to support a new paradigm for the management of patients with COPD, by integrating clinical data and parameters monitored in daily life using Artificial Intelligence algorithms. Therefore, the doctor is provided with a dynamic picture of the disease and its impact on lifestyle and vice versa, and can thus plan more personalized diagnostics, therapeutics, and social interventions. This strategy allows for a more effective organization of access to outpatient care and therefore a reduction of emergencies and hospitalizations because exacerbations of the disease can be better prevented and monitored. Hence, it can result in improvements in patients’ quality of life and lower costs for the healthcare system.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128301086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection? 没有组合环路的环形振荡器是否足以用于硬件木马检测?

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00044

L. Pyrgas, Aliki Panagiotarou, P. Kitsos

引用次数: 1

A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) Implementation CCSDS 131.2-B-1扩展ModCod (SCCC-X)实现的综合权衡分析

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00030

Matteo Bertolucci, Francesco Falaschi, Riccardo Cassettari, Daniele Davalle, L. Fanucci

{"title":"A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) Implementation","authors":"Matteo Bertolucci, Francesco Falaschi, Riccardo Cassettari, Daniele Davalle, L. Fanucci","doi":"10.1109/DSD51259.2020.00030","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00030","url":null,"abstract":"Following the expansion of the industry requiring small satellites with payloads producing high data rates, the Consultative Committee for Space Data Systems (CCSDS) introduced the CCSDS 131.2-B-1 standard in 2012. The standard combines Serially Concatenated Convolutional Codes (SCCC) with different types of modulation to provide a cost-effective, reliable and efficient payload data transmitter with a high degree of flexibility. This flexibility, due to the number of modulation and coding formats (ModCod), can help designers to better adapt the system configuration to the specific needs of the target. In addition, the use of Adaptive Code and Modulation (ACM) provides the means to adapt payload data transmission to variable channel conditions. To further increase flexibility, the ”EGRET - Next Generation High Rate Telemetry” project has recently defined a proposal to extend the CCSDS SCCC standard to include more efficient transmission schemes. This extension, also called SCCC-X, introduces 10 new ModCods together with a new SCCC-BCH combined encoder and new higher-order modulations (128-APSK and 256-APSK). This document illustrates the entire transmission chain architecture of the SCCC-X telemetry transmitter, highlighting the possible design trade-offs in order to provide a reference for other future developers. Special attention is paid to the analysis of implementation compromises in terms of Bit Error Rate (BER) loss, efficiency, throughput, and source occupation on relevant space-grade FPGAs. In particular, the synthesis results show that SCCC-X can be implemented without changes in the critical path compared to CCSDS 131.2-B-1 and that the implementations are able to achieve more than 450MSym/s on the Xilinx Space-Grade Kintex 7 Ultrascale FPGA and more than 250Msym/s on the Microsemi RTG4 FPGA.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"82 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121014633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Hard and Soft Logic Trade-offs for Multipliers in VTR VTR中乘法器的硬、软逻辑权衡

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00018

Georgiy Krylov, Jean-Philippe Legault, K. Kent

引用次数: 3

Towards High-Level Synthesis of Polymorphic Side-Channel Countermeasures 多态侧信道对抗的高级合成研究

2020 23rd Euromicro Conference on Digital System Design (DSD) Pub Date : 2020-08-01 DOI: 10.1109/DSD51259.2020.00040

Petr Socha, M. Novotný

{"title":"Towards High-Level Synthesis of Polymorphic Side-Channel Countermeasures","authors":"Petr Socha, M. Novotný","doi":"10.1109/DSD51259.2020.00040","DOIUrl":"https://doi.org/10.1109/DSD51259.2020.00040","url":null,"abstract":"Side-channel attacks pose a severe threat to both software and hardware cryptographic implementations. Current literature presents various countermeasures against these kinds of attacks, based on approaches such as hiding or masking, implemented either in software, or on register-transfer or gate-level in hardware. However, emerging trends in hardware design lean towards a system-level approach, allowing for faster, less errorprone, design process, an efficient hardware/software co-design, or sophisticated validation, verification, and (co)simulation strategies. In this paper, we propose a Boolean masking scheme suitable for high-level synthesis. We implement a protected PRESENT encryption in C language, utilizing the concept of dynamic logic reconfiguration, synthesize it for Xilinx Artix 7 FPGA, and we compare our results regarding clock cycle latency and area utilization. We evaluate the effectiveness of proposed countermeasures using specific t-test leakage assessment methodology. We show that our high-level synthesis implementation successfully conceals the side-channel leakage while maintaining reasonable area and latency overhead.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114531808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2