RISC-V Extension for Lightweight Cryptography

Etienne Tehrani, T. Graba, Abdelmalek Si-Merabet, J. Danger
{"title":"RISC-V Extension for Lightweight Cryptography","authors":"Etienne Tehrani, T. Graba, Abdelmalek Si-Merabet, J. Danger","doi":"10.1109/DSD51259.2020.00045","DOIUrl":null,"url":null,"abstract":"Lightweight Cryptography (LWC) is suitable for IoTs which require a high level of security while keeping a low complexity. Many lightweight cryptographic algorithms have been proposed to satisfy these requirements. But there is currently no emerging standard concerning the symmetric block ciphering, as every algorithm has its own advantage. For instance one can be optimized for low latency, another one for low complexity but requires more rounds to be cryptographically secure to the detriment of throughput. Hence, a processor able to cope with all the algorithms should be ideal to provide agility, performance and security while keeping an affordable complexity. We present in this paper a specific execution unit of the RISC-V processor which is able to run the most common lightweight 64-bit block ciphers. The gain in performance can reach over a hundred compared to the reference architecture. The acceleration takes advantage of five specific instructions which can easily be adapted to the execution unit of a VexRiscv architecture. The complexity can double when implementing the new execution unit, but provide a high degree of agility and performance when executing most of lightweight cryptographic implementations.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 23rd Euromicro Conference on Digital System Design (DSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD51259.2020.00045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Lightweight Cryptography (LWC) is suitable for IoTs which require a high level of security while keeping a low complexity. Many lightweight cryptographic algorithms have been proposed to satisfy these requirements. But there is currently no emerging standard concerning the symmetric block ciphering, as every algorithm has its own advantage. For instance one can be optimized for low latency, another one for low complexity but requires more rounds to be cryptographically secure to the detriment of throughput. Hence, a processor able to cope with all the algorithms should be ideal to provide agility, performance and security while keeping an affordable complexity. We present in this paper a specific execution unit of the RISC-V processor which is able to run the most common lightweight 64-bit block ciphers. The gain in performance can reach over a hundred compared to the reference architecture. The acceleration takes advantage of five specific instructions which can easily be adapted to the execution unit of a VexRiscv architecture. The complexity can double when implementing the new execution unit, but provide a high degree of agility and performance when executing most of lightweight cryptographic implementations.
轻量级加密的RISC-V扩展
轻量级加密(LWC)适用于要求高安全性同时保持低复杂性的物联网。为了满足这些要求,已经提出了许多轻量级的加密算法。但是对于对称分组加密,目前还没有一个新的标准,每种算法都有自己的优点。例如,一个可以针对低延迟进行优化,另一个可以针对低复杂性进行优化,但需要更多的轮来确保加密安全,从而损害吞吐量。因此,能够处理所有算法的处理器应该是理想的,以提供敏捷性、性能和安全性,同时保持可承受的复杂性。在本文中,我们提出了一个RISC-V处理器的特定执行单元,它能够运行最常见的轻量级64位块密码。与参考体系结构相比,性能的增益可以达到100以上。加速利用了五个特定的指令,这些指令可以很容易地适应于VexRiscv架构的执行单元。在实现新的执行单元时,复杂性可能会增加一倍,但在执行大多数轻量级加密实现时提供了高度的敏捷性和性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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