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VLSI Design and Test for Systems Dependability最新文献

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Radiation-Induced Soft Errors 辐射引起的软误差
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_3
E. Ibe, S. Yoshimoto, M. Yoshimoto, H. Kawaguchi, Kazutoshi Kobayashi, J. Furuta, Y. Mitsuyama, M. Hashimoto, T. Onoye, H. Kanbara, H. Ochi, K. Wakabayashi, H. Onodera, M. Sugihara
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引用次数: 3
Time-Dependent Degradation in Device Characteristics and Countermeasures by Design 器件特性的时变退化和设计对策
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_6
Takashi Sato, M. Hashimoto, S. Tanakamaru, K. Takeuchi, Yasuo Sato, S. Kajihara, M. Yoshimoto, Jinwook Jung, Y. Kimi, H. Kawaguchi, Hajime Shimada, Jun Yao
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引用次数: 1
Design Automation for Reliability 可靠性设计自动化
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_13
H. Yasuura
{"title":"Design Automation for Reliability","authors":"H. Yasuura","doi":"10.1007/978-4-431-56594-9_13","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_13","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127203300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Responsive Multithreaded Processor for Hard Real-Time Robotic Applications 用于硬实时机器人应用的响应式多线程处理器
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_24
N. Yamasaki, Hiroyuki Chishiro, Keigo Mizotani, K. Wada
{"title":"Responsive Multithreaded Processor for Hard Real-Time Robotic Applications","authors":"N. Yamasaki, Hiroyuki Chishiro, Keigo Mizotani, K. Wada","doi":"10.1007/978-4-431-56594-9_24","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_24","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134031221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design of SRAM Resilient Against Dynamic Voltage Variations 抗动态电压变化SRAM弹性设计
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_17
M. Yoshimoto, Y. Nakata, Y. Kimi, H. Kawaguchi, M. Nagata, K. Nii
{"title":"Design of SRAM Resilient Against Dynamic Voltage Variations","authors":"M. Yoshimoto, Y. Nakata, Y. Kimi, H. Kawaguchi, M. Nagata, K. Nii","doi":"10.1007/978-4-431-56594-9_17","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_17","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130209769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Connectivity in Electronic Packaging 电子封装中的连通性
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_8
H. Ishikuro, T. Kuroda, Atsutake Kosuge, M. Koyanagi, Kang-wook Lee, H. Hashimoto, M. Motoyoshi
{"title":"Connectivity in Electronic Packaging","authors":"H. Ishikuro, T. Kuroda, Atsutake Kosuge, M. Koyanagi, Kang-wook Lee, H. Hashimoto, M. Motoyoshi","doi":"10.1007/978-4-431-56594-9_8","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_8","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130394226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variations in Device Characteristics 器件特性的变化
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_5
H. Onodera, Y. Miura, Yasuo Sato, S. Kajihara, Toshinori Sato, Ken Yano, Yuji Kunitake, K. Nii
{"title":"Variations in Device Characteristics","authors":"H. Onodera, Y. Miura, Yasuo Sato, S. Kajihara, Toshinori Sato, Ken Yano, Yuji Kunitake, K. Nii","doi":"10.1007/978-4-431-56594-9_5","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_5","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"393 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123366486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Applications of Dependable Nonvolatile Memory Systems 可靠非易失性存储系统的设计与应用
VLSI Design and Test for Systems Dependability Pub Date : 2018-07-21 DOI: 10.1007/978-4-431-56594-9_18
S. Tanakamaru, K. Takeuchi
{"title":"Design and Applications of Dependable Nonvolatile Memory Systems","authors":"S. Tanakamaru, K. Takeuchi","doi":"10.1007/978-4-431-56594-9_18","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_18","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129733042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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