2011 20th European Conference on Circuit Theory and Design (ECCTD)最新文献_第3页

Effect of bandgap energy temperature dependence on thermal coefficient of bandgap reference voltage 带隙能量温度依赖对带隙参考电压热系数的影响

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043383

S. Kazeminia, K. Hadidi, A. Khoei, M. Azarmanesh

{"title":"Effect of bandgap energy temperature dependence on thermal coefficient of bandgap reference voltage","authors":"S. Kazeminia, K. Hadidi, A. Khoei, M. Azarmanesh","doi":"10.1109/ECCTD.2011.6043383","DOIUrl":"https://doi.org/10.1109/ECCTD.2011.6043383","url":null,"abstract":"In this paper the equations of basic bandgap reference (BGR) voltage circuits are reconstructed considering dependency of bandgap energy (E<inf>g</inf>) to absolute temperature. Notice that previous works all consider E<inf>g</inf> as a constant, independent of temperature variations. Dependence of bandgap energy to absolute temperature is firstly approximated by a second-degree polynomial using Lagrangian interpolating polynomial method in temperature range of 2°C to 92°C. Then the simplified polynomial is used to calculate the modified thermal coefficient (TC) of the base-emitter voltage (V<inf>BE</inf>) in BJT transistors. Accurate analysis of the resulted equations reveals that the TC of V<inf>BE</inf> must be corrected to −1.7mV/°K at 27°C ambient temperature which has been formerly reported about −1.5mV/°K ([2], [5]), −2mV/°K ([3], [9], [10]) and −2.2mV/°K ([4], [8]) where E<inf>g</inf> was assumed as a temperature-independent constant. More important, TC of V<inf>BE</inf> is derived to be −1.5mV/°K at 92°C rather than previously reported, −1.2mV/°K, a 20% error originated from constant E<inf>g</inf> assumption.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130212663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Efficient procedure for solving circuit algebraic-differential equations with modified sparse LU factorization improving fill-in suppression 改进稀疏LU分解法求解电路代数微分方程的有效方法，改善了填充抑制

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043637

J. Dobes, D. Cerny, D. Biolek

引用次数: 3

On-chip spectral test for high-speed ADCs by ΣΔ technique 利用ΣΔ技术对高速adc进行片上光谱测试

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043630

Shakeel Ahmad, J. Dabrowski

{"title":"On-chip spectral test for high-speed ADCs by ΣΔ technique","authors":"Shakeel Ahmad, J. Dabrowski","doi":"10.1109/ECCTD.2011.6043630","DOIUrl":"https://doi.org/10.1109/ECCTD.2011.6043630","url":null,"abstract":"Application of the ΣΔ modulation technique to the on-chip spectral test for high-speed A/D converters is presented. The harmonic HD2/HD3 and intermodulation IM2/IM3 test is obtained with one-bit ΣΔ sequence stored in a cyclic memory or generated on line, and applied to an ADC under test through a driving buffer and a simple reconstruction filter. To achieve a dynamic range (DR) suitable for high-performance spectral measurements a frequency plan is used taking into account the type of ΣΔ modulation (low-pass and band-pass) including the FFT processing gain. Higher order modulation schemes are avoided to manage the ΣΔ quantization noise without resorting to a more complicated filter. For spectral measurements up to the Nyquist frequency, we propose a dedicated low-pass/band-pass ΣΔ modulation scheme that limits spreading of the low-frequency quantization noise by ADC under test that tends to obstruct the test measurements at high frequencies. Correction technique for NRTZ encoding suitable for ADCs with very high clock frequencies is put in perspective. The presented technique is illustrated by simulation examples of a Nyquist-rate ADC under test.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124571494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Two-dimensional sinusoidal signal quality improvement by combined software and hardware means 采用软硬件相结合的方法改善二维正弦信号的质量

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043307

G. Budzyń, T. Podzorny, J. Rzepka

引用次数: 2

Periodic behaviors in discretized second-order terminal sliding mode control systems 离散二阶终端滑模控制系统的周期行为

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043623

Z. Galias, Xinghuo Yu

引用次数: 2

A bandpass sigma-delta domain single-flux quantum wave filter 一个带通σ - δ域单通量量子波滤波器

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043840

T. Yasuno, H. Fujisaka, T. Kamio, K. Haeiwa

引用次数: 1

Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS 40纳米CMOS中用于WiMAX ADPLL的时间-数字转换器(TDC)

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043362

Popong Effendrik, Wenlong Jiang, M. V. D. Gevel, Frank Verwaal, R. Staszewski

{"title":"Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS","authors":"Popong Effendrik, Wenlong Jiang, M. V. D. Gevel, Frank Verwaal, R. Staszewski","doi":"10.1109/ECCTD.2011.6043362","DOIUrl":"https://doi.org/10.1109/ECCTD.2011.6043362","url":null,"abstract":"WiMAX (Worldwide Inter-operability for Microwave Access) is an emerging wireless technology standard, which enables high-speed packet data access. To anticipate future demands of WiMAX technology, we propose an all-digital phase-locked loop (ADPLL) based frequency synthesizer for the WiMAX RF transceiver. The developed ADPLL targets frequencies from 2.3–2.7 GHz and from 3.3–3.8 GHz for low band and high band, respectively. A key component of the ADPLL is a time-to-digital converter (TDC), which replaces the traditional phase/frequency detector and charge-pump. The TDC implementation in 40-nm CMOS technology is chosen and presented in this paper. The TDC architecture is based on a pseudo-differential structure. The TDC system has been verified at 1.2 V of power supply, 33.868 MHz frequency reference (FREF) clock and 4.25 GHz output RF frequency. It is found that the power consumption is about 2.99 mW without a clock gating scheme, but is expected to be reduced to 0.78 mW with the clock gating scheme. The INL and DNL of the TDC is lower than 0.4 LSB. The TDC resolution is between 10.84–12.55 ps. At the worst case condition, the TDC resolution of 12.55 ps will produce the in-band phase noise better than −95 dBc/Hz as required by WiMAX ADPLL system. The TDC core layout has a silicon area of only 125×11 µm2.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122050454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Accurate micropower class AB CMOS voltage-to-current converter 精确的微功率级AB CMOS电压电流转换器

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043290

A. López-Martín, Fermin Esparza-Alfaro, J. Ramírez-Angulo, R. Carvajal

引用次数: 6

Designing two-channel nonuniform-division FIR filter banks with variable notches 可变陷波双通道非均分FIR滤波器组的设计

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043350

Keisuke Ishizawa, T. Miyata, N. Aikawa

引用次数: 0

An ontology for constraints in custom IC design 定制集成电路设计中的约束本体

2011 20th European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2011-10-13 DOI: 10.1109/ECCTD.2011.6043355

Andreas Krinke, J. Lienig

引用次数: 1