Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium最新文献_第2页

High power multichip modules employing the planar embedding technique and microchannel water heat sinks 采用平面嵌入技术和微通道水散热器的大功率多芯片模块

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566782

R. Hahn, A. Kamp, A. Ginolas, M. Schmidt, J. Wolf, V. Glaw, M. Topper, O. Ehrmann, H. Reichl

引用次数: 23

Thermal modeling of grease-type interface material in PPGA application 润滑脂型界面材料在PPGA应用中的热建模

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566783

C. Chiu, G. Solbrekken, Yoke, Chung

{"title":"Thermal modeling of grease-type interface material in PPGA application","authors":"C. Chiu, G. Solbrekken, Yoke, Chung","doi":"10.1109/STHERM.1997.566783","DOIUrl":"https://doi.org/10.1109/STHERM.1997.566783","url":null,"abstract":"Heat sinks are widely used for cooling electronic packages. Typically, a highly conductive thermal interface material is used to enhance heat transfer from the package to the sink. One such material is thermal grease, which has the advantage of conforming to the heat sink and package surfaces. This paper focuses on the application of thermal grease to Plastic Pin Grid Array (PPGA) packages and thermal modeling of the resulting interface between the PPGA package and the heat sink. An experiment was performed to obtain the \"bulk\" and \"apparent\" thermal conductivity of a thermal grease. It was observed that the apparent thermal conductivity is lower than the bulk thermal conductivity, particularly for a thin grease thickness. The thermal interface resistance can be modeled by using bulk thermal conductivity in series with the contact resistance. Alternatively, an apparent thermal conductivity which incorporates contact resistance can be used. A second experiment was performed to understand the impact of grease voiding on thermal performance. A corresponding finite element model was created using the apparent thermal conductivity calculated from the first experiment. Both model and experiment showed that thermal performance is more sensitive to voiding at the package center than voiding at the package periphery.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129887800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 30

Advanced cooling techniques comparison for airborne electronic circuits 机载电子电路先进冷却技术比较

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566790

Y. Assouad, M. Caplot, T. Gautier

引用次数: 2

Thermal sub-modeling of the wirebonded plastic ball grid array package 线结塑料球栅阵列封装的热子建模

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566777

Z. Johnson, K. Ramakrishna, B. Joiner, M. Eyman

引用次数: 29

Organic PGA packaging-a performance comparison with ceramic PGA 有机PGA封装-与陶瓷PGA的性能比较

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566789

R. Viswanath, Chia-Pin Chin

引用次数: 3

Pressure loss modeling for surface mounted cuboid-shaped packages in channel flow 通道流动中表面安装长方体封装的压力损失建模

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566802

P. Teertstra, M. Yovanovich, J. Culham

引用次数: 8

Recent achievements in the thermal characterization of electronic devices by means of boundary condition independent compact models 用不依赖边界条件的紧凑模型表征电子器件热特性的最新成果

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566780

H. Vinke, C. Lasance

{"title":"Recent achievements in the thermal characterization of electronic devices by means of boundary condition independent compact models","authors":"H. Vinke, C. Lasance","doi":"10.1109/STHERM.1997.566780","DOIUrl":"https://doi.org/10.1109/STHERM.1997.566780","url":null,"abstract":"In this paper recent achievements in the thermal characterization of electronic devices by means of so-called 'compact models' are described. A 'compact model' is a simplification of a detailed model of a device. It is a simple network comprising a limited number of thermal resistances (typically 7), connecting the critical part of the device (usually the junction) to the outer parts of the device, is independent of the applied boundary conditions, and is capable of accurately representing the full model. This method of thermal characterization is suited for embedding in the design environments that are employed by the electronics industries, and the compact models can be incorporated into the component libraries linked to PCB thermal analysis software packages. A new methodology for deriving more or less 'standardized' compact models is presented. The possibility of creating parametric compact models, and the influence of differences in ambient temperatures, is discussed. It is demonstrated that the thermal behaviour of electronic devices by means of compact models can be approached within typically 6% of the detailed model values.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129552957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 28

Transient thermal study of laser diodes 激光二极管的瞬态热研究

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566799

C.C. Lee, J. Lee, D. H. Chien, R. Shih

{"title":"Transient thermal study of laser diodes","authors":"C.C. Lee, J. Lee, D. H. Chien, R. Shih","doi":"10.1109/STHERM.1997.566799","DOIUrl":"https://doi.org/10.1109/STHERM.1997.566799","url":null,"abstract":"The transient thermal response of laser diodes is measured using the optical power as the temperature sensitive parameter. Commercial laser diodes in TO packages are chosen for this study. The monitoring photodiode in the package is used to measure the optical power. When the laser is driven by a long pulse signal, the optical power decreases within the pulse duration as a result of temperature increase. From the amount of optical power decrease, the temperature rise is determined. For comparison, a finite element technique is employed to model the laser device for both steady and transient analyses. The complete model includes the laser chip, the sub-mount, and the heatsink. The calculated transient response shows clearly how the temperature changes with time as step power is applied. The measured thermal resistance is significantly lower than the calculated one because the circuit is not fast enough to capture the true initial optical power when the laser is turned on. As a result, the initial optical power value is underestimated. This also underestimates the percentage decrease in optical power within the pulse duration and consequently the temperature rise. To correct this problem, a faster circuit is required.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"334 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116651071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Surface mount technology heat sinks for D/sup 2/PAK and D/sup 3/PAK power semiconductors 用于D/sup 2/PAK和D/sup 3/PAK功率半导体的表面贴装技术散热器

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566791

E.G. Flynn, C. Johnston, S. Lee

{"title":"Surface mount technology heat sinks for D/sup 2/PAK and D/sup 3/PAK power semiconductors","authors":"E.G. Flynn, C. Johnston, S. Lee","doi":"10.1109/STHERM.1997.566791","DOIUrl":"https://doi.org/10.1109/STHERM.1997.566791","url":null,"abstract":"A new surface mount heat sink has been developed for the D/sup 2/PAK and D/sup 3/PAK components. Experimental and analytical studies have been carried out, characterizing the thermal performance of the components on a printed circuit card with and without the heat sink. The addition of a surface mount heat sink reduces the total thermal resistance of the components as much as a factor of two in forced convection applications, and approximately 20 to 30% in the case of natural convection. This highlights the importance of the thermal path through the card and the component itself. In situations where the conjugate effect of heat transfer is particularly strong as in the present case, the total thermal resistance is not a linear function of heat input as the ratio of heat partition into different paths depends on the amount of total heat dissipation. This non-linear behavior is observed in the measurements and analytical results. It was also revealed through comparisons between the measurements and computed results, that the heat dissipation through the insulating foam under the back surface of the card cannot be ignored.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126626613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Compact air-cooled heat sinks for power packages 紧凑的空气冷却散热器的动力包

Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium Pub Date : 1997-01-28 DOI: 10.1109/STHERM.1997.566794

A. Aranyosi, L. Bolle, H. Buyse

{"title":"Compact air-cooled heat sinks for power packages","authors":"A. Aranyosi, L. Bolle, H. Buyse","doi":"10.1109/STHERM.1997.566794","DOIUrl":"https://doi.org/10.1109/STHERM.1997.566794","url":null,"abstract":"The main findings of theoretical and experimental work carried out in the development of compact air-cooled heat sinks tailored for spot-cooling of power packages are presented. After formulating the particular cooling task, the thermal issues and practical constraints of a compact heat exchanger design are matched to yield three structures, i.e., microchannel, woven wire screen and porous metal fibre, to be viable candidates. A simplified analytical model is developed to allow performance analyses and optimizations of microchannel and woven wire screen heat sinks operated in impingement mode. Based on the simulation results, five novel heat sinks are fabricated and tested. An experimental setup is built to investigate the effects of heat sink structure, mass-flow rate of air, power dissipation and mounting conditions on heat sink performance. In the measurements the source-gate voltage of the selected MOSFET is used as temperature sensitive electrical parameter (TSEP) to obtain the peak junction temperature. Dissipated base plate and volumetric heat fluxes of 15 W/cm/sup 2/ and 5 W/cm/sup 3/ are achieved, along with reasonable pressure and pumping power requirements as well as accompanying acoustic noise. Obtained results yield a fivefold enhancement in heat removal capability compared to traditional forced air-cooling schemes.","PeriodicalId":126120,"journal":{"name":"Thirteenth Annual IEEE. Semiconductor Thermal Measurement and Management Symposium","volume":"16 44","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113963138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17