2014 IEEE 16th Electronics Packaging Technology Conference (EPTC)最新文献_第6页

Optimization of the wafer level molding process for high power device module 大功率器件模块晶圆级成型工艺的优化

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028368

L. Bu, S. Ho, Dexter Velez Sorono, Daniel Rhee Min Woo

{"title":"Optimization of the wafer level molding process for high power device module","authors":"L. Bu, S. Ho, Dexter Velez Sorono, Daniel Rhee Min Woo","doi":"10.1109/EPTC.2014.7028368","DOIUrl":"https://doi.org/10.1109/EPTC.2014.7028368","url":null,"abstract":"High power modules are indispensible in our future automotive, aerospace and green & renewable energy industry. However, a lot of issues rise along with the power rising. More components are needed to increase the reliability, dissipate heat and etc. Thus, the whole packages are more complicated than the normal ones. Complicated structure including copper clips makes the molding process rather difficult. Voids are more easily to be trapped in between the pads under the chip covered by the copper clip. In our simulation, we are trying to achieve void free molding by varying the dispensing pattern, the package layout and initial diameter of molding compound on the wafer. The results show that round dispensing pattern dominates straight line dispensing pattern in the measurement of voids coverage as well as the incomplete fill. However, the four packages on the outmost of the wafer still contain high coverage of voids ratio. Therefore, the extremely high voids coverage packages are removed eventually from the wafer. In the parametric studies of diameter of the initial dispensing pattern shows that smaller diameter results in lower voids issue. A series of simulation are carried out to achieve a void free molding process.","PeriodicalId":115713,"journal":{"name":"2014 IEEE 16th Electronics Packaging Technology Conference (EPTC)","volume":"321 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131800002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Challenges and solutions on pre-assembly processes for thinned 3D wafers with micro-bumps on the backside 带有微凸点的3D晶圆薄壁预组装工艺的挑战与解决方案

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028283

A. Podpod, C. Demeurisse, C. Gerets, K. Rebibis, G. Capuz, F. Duval, A. Phommahaxay, E. Sleeckx, H. Struyf, R. A. Miller, G. Beyer, E. Beyne

引用次数: 6

Alternative package-on-package with organic substrate interposer for stacking packaging solution 替代封装对封装与有机基板中间层堆叠封装解决方案

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028323

Steven Lin, M. Liao, Albert Lan, Davidlion Wang

引用次数: 1

Capacitive crosstalk compensation structure for improved high-speed on-package signaling 改进高速封装信号的电容串扰补偿结构

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028279

B. E. Cheah, J. Kong, Ping Ping Ooi, Kok Hou Teh, Po Yin Yaw

引用次数: 0

Inkjet printed transmission line elements for RF applications and measurement challenges 用于射频应用和测量挑战的喷墨印刷传输线元件

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028360

N. Narampanawe, S. K. Yak, Zhang Jie

引用次数: 0

Aging effect on creep properties of SnBi solders 时效对SnBi钎料蠕变性能的影响

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028312

M. Sakane, K. Yagi, Takamoto Itoh, M. Yamashita, H. Hokazono

引用次数: 0

Electrical measurement and analysis of TSV/RDL for 3D integration 三维集成TSV/RDL的电测量与分析

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028399

Xin Sun, R. Fang, Yunhui Zhu, Xiao Zhong, Yuan Bian, Shengli Ma, M. Miao, J. Chen, Yan Wang, Yufeng Jin

引用次数: 4

Etch-hole design in encapsulation for better robustness 封装中的蚀刻孔设计，具有更好的坚固性

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028256

Jaewung Lee, J. Sharma, S. Merugu, Navab Singh

引用次数: 2

Thermal and mechanical reliability of low-temperature solder alloys for handheld devices 手持设备用低温焊料合金的热可靠性和机械可靠性

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028385

M. Ribas, Sujatha Chegudi, Anilesh Kumar, R. Pandher, R. Raut, S. Mukherjee, S. Sarkar, Bawa Singh

引用次数: 3

An automatic visual system to identify and estimate ionic contamination in printed circuit boards using electrochemical migration patterns 一种利用电化学迁移模式识别和估计印刷电路板中离子污染的自动视觉系统

2014 IEEE 16th Electronics Packaging Technology Conference (EPTC) Pub Date : 2014-12-01 DOI: 10.1109/EPTC.2014.7028406

H. Villanueva, M. Mena, P. Naval

{"title":"An automatic visual system to identify and estimate ionic contamination in printed circuit boards using electrochemical migration patterns","authors":"H. Villanueva, M. Mena, P. Naval","doi":"10.1109/EPTC.2014.7028406","DOIUrl":"https://doi.org/10.1109/EPTC.2014.7028406","url":null,"abstract":"Detection and estimation of ionic contamination in electronics is important, in order to ensure manufacturing quality by detecting the cause and preventing failure mechanisms such as electrochemical migration (ECM). However, such tests require expensive, specialized equipment. This paper proposes a low-cost, automatic, visual-based method, in which the ionic contamination profile of a printed circuit board is determined through the analysis of shape and color features of optical microscope images of ECM failures. Images of copper dendrites were acquired through the water drop test using solutions contaminated with NaCl and Na2SO4 from 10-50 ppm, in steps of 10. Thresholding and connected component analysis were used to segment the shorting dendrite. The method used three types of features: global and local shape features, and color features. Two feature selection methods, ReliefF and Correlation-based Feature Selection (CFS) were also tested to measure feature quality and to determine the best feature subsets. The predictive model used was feature-weighted k-nearest neighbor. The study determined that copper dendrites produced with sodium sulfate contaminant were larger and denser compared to sodium chloride. Increasing the amount of contaminant also increased the density of the pattern. At higher sodium sulfate contamination levels, dendrites tended to have reddish tips, while with sodium chloride, branch shapes transitioned from a well-defined appearance to a “stringy” appearance. The system was able to distinguish between the two contaminants at 97.3%, while using only eight descriptors. The system was also able to distinguish between five closely-spaced contaminant levels at 63.38% and 57.14% accuracy for sodium chloride and sodium sulfate respectively. Local shape features, which were not used in previous work, were found to be generally more useful compared to global shape features.","PeriodicalId":115713,"journal":{"name":"2014 IEEE 16th Electronics Packaging Technology Conference (EPTC)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131963725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1