Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97最新文献

筛选
英文 中文
System level memory optimization for hardware-software co-design 硬件软件协同设计的系统级内存优化
K. Danckaert, F. Catthoor, H. Man
{"title":"System level memory optimization for hardware-software co-design","authors":"K. Danckaert, F. Catthoor, H. Man","doi":"10.1109/HSC.1997.584579","DOIUrl":"https://doi.org/10.1109/HSC.1997.584579","url":null,"abstract":"Application studies in the areas of image and video processing systems indicate that between 50 and 80% of the area cost in (application-specific) architectures for real-time multi-dimensional signal processing (RMSP) is due to data storage and transfer of array signals. This is true for both singleand multi-processor realizations, both customized and (embedded) programmable targets. This paper has two main contributions. First, to reduce this dominant cost, we propose to address the system-level storage organization for the multi-dimensional signals as a first step in the overall methodology to map these applications, before the hardware/software partitioning decision. Secondly, we demonstrate the usefulness of this novel approach based on a realistic test vehicle, namely a quad-tree based image coding application.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114439036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Optimizing communication in embedded system co-simulation 嵌入式系统协同仿真中的通信优化
Ken Hines, G. Borriello
{"title":"Optimizing communication in embedded system co-simulation","authors":"Ken Hines, G. Borriello","doi":"10.1109/HSC.1997.584590","DOIUrl":"https://doi.org/10.1109/HSC.1997.584590","url":null,"abstract":"The Pia hardware-software co-simulator provides substantial speedups over traditional co-simulation methods by permitting dynamic changes in the level of detail when simulating communication channels between system components. However, it places a burden on the designer to develop several communication routines, at different levels of abstraction, for each communication operation. This often requires an intimate understanding of both the simulator and the design being simulated. We present and demonstrate a way to use communication transaction annotations to provide a platform independent language for describing fast communication primitives. Additionally we show a tool for automatically generating some of these annotations, so that the designer does not even require an intimate understanding of the design under simulation. This can be important when simulating systems where the design itself is synthesized by automatic tools, and is liable to change frequently.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"254 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120862177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
Modifying min-cut for hardware and software functional partitioning 修改硬件和软件功能分区的最小切割
F. Vahid
{"title":"Modifying min-cut for hardware and software functional partitioning","authors":"F. Vahid","doi":"10.1109/HSC.1997.584577","DOIUrl":"https://doi.org/10.1109/HSC.1997.584577","url":null,"abstract":"The Kernighan/Lin heuristic, also known as min-cut, has been extended very successfully for circuit partitioning over several decades. Those extensions customized the heuristic and its associated data structure to rapidly compute the minimum-cut metric required during circuit partitioning thus, those extensions are not applicable to problems requiring other metrics. The author extends the heuristic for functional partitioning in a manner applicable to the codesign problem of hardware/software partitioning as well as to hardware/hardware partitioning. The extension customizes the heuristic and data structure to rapidly compute execution-time and communication metrics, crucial to hardware and software partitioning, and leads to near-linear time-complexity and excellent results. The experiments demonstrate extremely fast execution times (just a few seconds) with results matched only by the much slower simulated annealing heuristic, meaning that the extended Kernighan/Lin heuristic will likely prove hard to beat for hardware and software functional partitioning.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128962303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
A HW/SW co-design environment for multi-media equipments development using inverse problem 基于逆问题的多媒体设备软硬件协同设计环境
F. Suzuki, H. Koizumi, M. Hiramine, K. Yamamoto, H. Yasuura, K. Okino
{"title":"A HW/SW co-design environment for multi-media equipments development using inverse problem","authors":"F. Suzuki, H. Koizumi, M. Hiramine, K. Yamamoto, H. Yasuura, K. Okino","doi":"10.1109/HSC.1997.584595","DOIUrl":"https://doi.org/10.1109/HSC.1997.584595","url":null,"abstract":"Multimedia equipment development must provide functions that are adjusted to human sensibilities. Realization of such functions depends on how the three transfer levels of perception, recognition and susceptibility are handled. In this paper, we deal with perception by employing an inverse problem to characterize the system and correctly reproduce signals. To accommodate recognition and susceptibility, we propose an optimization method in which results are compared repeatedly with a model of human recognition characteristics. With respect to system response, numerical models, filter design, playback, evaluation, cost and performance estimates when implemented as semiconductor circuits, and generation of a netlist for semiconductor production, we propose an environment for hardware/software (HW/SW) co-design and development based on four steps which make possible comprehensive, systematic development and design, from the conceptual stage through to production. A procedure for solving the inverse problem is incorporated in the four areas of this environment, which are interconnected and efficiently linked to the development process, so that the overall development cycle can be shortened. This proposal was applied to the development of a television receiver and audio circuitry, and its effectiveness was confirmed.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124894724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An object-oriented communication library for hardware-software codesign 面向对象的软硬件协同设计通信库
F. Vahid, L. Tauro
{"title":"An object-oriented communication library for hardware-software codesign","authors":"F. Vahid, L. Tauro","doi":"10.1109/HSC.1997.584583","DOIUrl":"https://doi.org/10.1109/HSC.1997.584583","url":null,"abstract":"Implementing communication between hardware and software components can be a time-consuming task. Numerous communication protocols are available, differing greatly in their implementation details. Designers must spend much time focusing on those details. Even when libraries are available to encapsulate communication into C or VHDL routines, these routines are not consistent across protocols, making it difficult to switch to other protocols. We propose an object-oriented communication library, which provides pre-implemented channel-based send/receive communication primitives, allowing easy implementation and seamless migration across protocols and components.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129757658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 41
An evolutionary approach to system-level synthesis 系统级综合的进化方法
J. Teich, T. Blickle, L. Thiele
{"title":"An evolutionary approach to system-level synthesis","authors":"J. Teich, T. Blickle, L. Thiele","doi":"10.1109/HSC.1997.584597","DOIUrl":"https://doi.org/10.1109/HSC.1997.584597","url":null,"abstract":"Considers system-level synthesis as the problem of optimally mapping a task-level specification onto a heterogeneous hardware/software architecture. This problem requires: (1) the selection of the architecture (allocation), including general-purpose and dedicated processors, ASICs, buses and memories; (2) the mapping of the algorithm onto the selected architecture in space (binding) and time (scheduling); and (3) the design space exploration, with the goal of finding a set of implementations that satisfy a number of constraints on cost and performance. In this paper, a new graph-based mapping model is introduced to specify the task of system-level synthesis as an optimization problem. An evolutionary algorithm is adapted to solve this problem and is applied to explore the design space of video-codec implementations.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125745860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 89
Software implementation techniques for HW/SW embedded systems 硬件/软件嵌入式系统软件实现技术
J. P. Calvez, O. Pasquier, J. Peckol
{"title":"Software implementation techniques for HW/SW embedded systems","authors":"J. P. Calvez, O. Pasquier, J. Peckol","doi":"10.1109/HSC.1997.584578","DOIUrl":"https://doi.org/10.1109/HSC.1997.584578","url":null,"abstract":"Our focus is the software implementation of control-oriented systems. Such a task is one of the least automated portions of the contemporary codesign process. In systems that must respond to external events, often several asynchronous tasks are implemented on the same processor. We are studying such systems because they often utilize a dynamic multi-rate scheduling technique using a multitasking real-time kernel. Based upon the MCSE functional model as a specification input, we propose a set of transformation rules that one can apply to the functional structure to reduce the complexity of the software design prior to implementation. We further show that after such optimizations, the microprocessor interrupt system can often be used as an efficient priority-based scheduler, thereby removing the need for a real-time kernel. The resulting implementation is described using a software implementation diagram from which it is easy to prove the timing constraints are satisfied. We use a simplified control system to illustrate our approach and to show a smooth incremental codesign path with a better integration of software estimates into the partitioning decision.","PeriodicalId":104833,"journal":{"name":"Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129875566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信