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2013 3rd IEEE CPMT Symposium Japan最新文献

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Optimal laser condition for laser soldering in cream and ring solder 奶油和环形焊料激光焊接的最佳激光条件
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756108
R. Kibushi, Tomoyuki Hatakyeama, Dai Imai, S. Nakagawa, M. Ishizuka
{"title":"Optimal laser condition for laser soldering in cream and ring solder","authors":"R. Kibushi, Tomoyuki Hatakyeama, Dai Imai, S. Nakagawa, M. Ishizuka","doi":"10.1109/ICSJ.2013.6756108","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756108","url":null,"abstract":"This study describes fundamental melting phenomena of ring and cream solder and an evaluation of heat loss in laser soldering. Laser soldering is attractive from the viewpoint of minimum thermal impact on surrounding devices. However, detecting an appropriate laser irradiation condition is difficult since the heat loss is affected by several factors. Therefore, detecting an appropriate laser irradiation condition is important for more efficient laser soldering. In this study, to observe the fundamental melting phenomena of ring and cream solder, the movie of the melting phenomena were taken by highspeed camera. Then, laser irradiation time and solder type dependence of energy loss (heat loss) from solder to surrounding parts was discussed. The results indicated that contact surface of melted cream solder becomes larger than that of ring solder during laser irradiation. Due to larger contact surface, the minimum required laser power for complete melt of cream solder is larger than that of ring solder. Further, it was investigated the energy loss per second of each solder becomes constant.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"430 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122925219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Preparation of solder plated patterns on paper and applying to RFID tags 纸上镀锡图案的制备及应用于RFID标签
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756124
Y. Sakai, K. Sasaki, T. Futakuchi, Ken-ichi Honda, Keiichi Hirose, Akihiro Inoda
{"title":"Preparation of solder plated patterns on paper and applying to RFID tags","authors":"Y. Sakai, K. Sasaki, T. Futakuchi, Ken-ichi Honda, Keiichi Hirose, Akihiro Inoda","doi":"10.1109/ICSJ.2013.6756124","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756124","url":null,"abstract":"In this study, we investigate the preparation of radio frequency identification tags on paper by using screen printing, solder plating, and self-alignment attachment. Waste-fluids are not produced in the proposed process. In addition, the process of preparing the tags involves fewer steps compared to the general process. Moreover, the prepared tags are heat resistant at temperatures greater than 200 °C.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"345 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123537448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Development of touch panel system by single layer without pattern: Capable large touch panel due to large S/N and simple structure 单层无图案触控面板系统的开发:由于信噪比大，结构简单，可以实现大型触控面板
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756106
Yoichi Sato, Y. Akiyama, K. Hashimoto, K. Otsuka, Koichi Meguro
{"title":"Development of touch panel system by single layer without pattern: Capable large touch panel due to large S/N and simple structure","authors":"Yoichi Sato, Y. Akiyama, K. Hashimoto, K. Otsuka, Koichi Meguro","doi":"10.1109/ICSJ.2013.6756106","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756106","url":null,"abstract":"We propose a novel touch panel structure, sensing method, and system which composes a low-cost transparent electrically-conductive thin film with higher Rs than the ITO film by two orders of magnitude. Relatively small number of extraction electrodes is directly attached upon the thin film without any circuit pattern. The proposed panel can realize even the wall tapestry-type touch panel of larger area as well as the smaller size one, and also can play single and multi-touch operations even through gloved fingers. In this paper, we will mainly mention about this packaging technology.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129797205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Serially-grafted electrooptic polymer waveguide fabricated by thermal imprint lithography 热压印技术制备的串联接枝电光聚合物波导
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756102
O. Sugihara, Toshiaki Hirata, F. Tan, T. Kaino
{"title":"Serially-grafted electrooptic polymer waveguide fabricated by thermal imprint lithography","authors":"O. Sugihara, Toshiaki Hirata, F. Tan, T. Kaino","doi":"10.1109/ICSJ.2013.6756102","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756102","url":null,"abstract":"Electro-optic (EO) polymer is a promising candidate for active material in realizing future EO modulation. It offers high-bandwidth optical modulator devices. Thermally-curable polycyanurate (PCN) doped with nonlinear optical chromophores is studied to create guest-host EO polymers with stable second-order nonlinearity. PCN-based optical waveguide is fabricated by simple thermal imprint lithography using a silicone mold. Single-mode propagation at a wavelength of 1300 nm is realized by fine-tuning the refractive index of core and cladding materials. Based on this technique an approach for serially-grafted optical waveguide is discussed.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126188161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Microstructural control of electrically conductive adhesives with Ag micro-fillers by binder chemistry 用粘结剂化学方法控制银微填料导电胶的微观结构
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756122
M. Inoue, Yasunori Tada, H. Muta, S. Yamanaka
{"title":"Microstructural control of electrically conductive adhesives with Ag micro-fillers by binder chemistry","authors":"M. Inoue, Yasunori Tada, H. Muta, S. Yamanaka","doi":"10.1109/ICSJ.2013.6756122","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756122","url":null,"abstract":"Variations in the electrical resistivity and microstructural evolution in epoxy-based adhesives containing Ag micro-fillers (flakes and micro-particles) were investigated during curing and post-annealing. Sintering of micro-fillers was successfully induced in the adhesive binders, although the sintering behavior varied depending on the matrix chemistry. The electrical resistivity of the adhesives was markedly reduced as a result of filler sintering. When we used some polymer alloy binders, such as poly-urethane based binder, ultra high conductivity (below 10 μΩcm) was achieved by curing at 150°C Thus, binder chemistry is one of the important factors for design of electrically conductive adhesive materials.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125714184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Effect of leveler on microstructure and stress of electroplated copper for TSV application 矫直机对TSV镀铜显微组织和应力的影响
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756081
Xue Feng, Wei-Xiong Luo, Ming Li, Su Wang
{"title":"Effect of leveler on microstructure and stress of electroplated copper for TSV application","authors":"Xue Feng, Wei-Xiong Luo, Ming Li, Su Wang","doi":"10.1109/ICSJ.2013.6756081","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756081","url":null,"abstract":"Through silicon via (TSV) with many advantages comparing with traditional technology is playing an important role in three-dimensional large-scale integration. In this paper, we have studied Effect of leveler on microstructure and stress of electroplated copper for TSV application. We demonstrate residual stress, SEM, TEM and electrochemistry results which have strong connection with leveler in via copper electroplating solution.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128474379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 77 GHz CMOS power amplifier module using multi-layered redistribution layer technology 一种采用多层再分配层技术的77 GHz CMOS功率放大器模块
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756075
Masaru Sato, Y. Ishizuki, S. Sasaki, Y. Kawano, H. Matsumura, Toshihide Suzuki, M. Tani
{"title":"A 77 GHz CMOS power amplifier module using multi-layered redistribution layer technology","authors":"Masaru Sato, Y. Ishizuki, S. Sasaki, Y. Kawano, H. Matsumura, Toshihide Suzuki, M. Tani","doi":"10.1109/ICSJ.2013.6756075","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756075","url":null,"abstract":"This paper presents a new millimeter-wave module concept, which is an integration of CMOS monolithic microwave integrated circuits (MMICs) and passive devices fabricated using a redistribution layer (RDL) technology. To realize a low-loss passive circuit, we introduced a multi-metal-layer for the RDL. The first metal layer was used as ground to shield from substrates. The upper metal layers form passive RF components such as a thin film microstrip line (TFMSL), a spiral inductor, a balun, a power combiner, and an antenna. Detailed measurements and characterizations are presented, and we show their applicability in the millimeter-wave region. Moreover, this concept was applied to an integrating millimeter-wave module consisting of four identical CMOS power amplifiers and RDL power combiners to increase the output power. The module exhibited a saturation power of 15 dBm, which is almost four-times higher than that obtained from the single PA. The measured small-signal gain of the PA module was 5.4 dB. The total chip size was 2.2 × 1.5 mm2. The power consumption of the PA module was 800 mW.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133480426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
The effect of surface roughness on high frequency transmission line 表面粗糙度对高频传输线的影响
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756086
Toshiki Iwai, D. Mizutani, M. Tani
{"title":"The effect of surface roughness on high frequency transmission line","authors":"Toshiki Iwai, D. Mizutani, M. Tani","doi":"10.1109/ICSJ.2013.6756086","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756086","url":null,"abstract":"We propose a method for measuring effects of surface roughness on transmission characteristics eliminating the manufacturing error. We verified the structure using electromagnetic simulation and measured three different types of surface roughness.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132630444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Built-in IDDT appearance time sensor for detecting open faults in 3D IC 内置IDDT外观时间传感器，用于检测3D集成电路中的开路故障
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756127
S. Suenaga, M. Hashizume, H. Yotsuyanagi, T. Tada, Shyue-Kung Lu
{"title":"Built-in IDDT appearance time sensor for detecting open faults in 3D IC","authors":"S. Suenaga, M. Hashizume, H. Yotsuyanagi, T. Tada, Shyue-Kung Lu","doi":"10.1109/ICSJ.2013.6756127","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756127","url":null,"abstract":"A built-in sensor is proposed for detecting open faults in a 3D IC by means of appearance time of dynamic supply current. It is shown by Spice simulation that they can be detected with the sensor.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125099657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reduction method of number of electromagnetic simulation times for estimating output voltage at hard open TSV in 3D IC 三维集成电路中硬开路TSV输出电压估计电磁仿真次数的减少方法
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756128
E. Haraguchi, M. Hashizume, Katsuya Manabe, H. Yotsuyanagi, T. Tada, Shyue-Kung Lu, Z. Roth
{"title":"Reduction method of number of electromagnetic simulation times for estimating output voltage at hard open TSV in 3D IC","authors":"E. Haraguchi, M. Hashizume, Katsuya Manabe, H. Yotsuyanagi, T. Tada, Shyue-Kung Lu, Z. Roth","doi":"10.1109/ICSJ.2013.6756128","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756128","url":null,"abstract":"An estimation method of quiescent output voltage of a defective TSV is proposed at which a hard open defect occurs in a 3D IC. The method enables us to reduce the number of times of 3D electromagnetic simulation.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130373021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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