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2013 3rd IEEE CPMT Symposium Japan最新文献

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High bandwidth application with Wide I/O memory on 2.5D-IC silicon interposer 在2.5D-IC硅中间体上具有宽I/O存储器的高带宽应用
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756088
Chen-Chao Wang, Hung-Hsiang Cheng, Ming-Feng Chung, Po-Chih Pan, C. Chiu, C. Hung
{"title":"High bandwidth application with Wide I/O memory on 2.5D-IC silicon interposer","authors":"Chen-Chao Wang, Hung-Hsiang Cheng, Ming-Feng Chung, Po-Chih Pan, C. Chiu, C. Hung","doi":"10.1109/ICSJ.2013.6756088","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756088","url":null,"abstract":"A potential technology by silicon interposer enables high bandwidth and low power application processing devices of the future, because the demand of smart mobile products are driving for higher logic-to-memory bandwidth (BW) over 30 GB/s with lower power consumption and ultra-memory capacity. This paper presents a 2.5D-IC structure with silicon interposer to demonstrate electrical performances including signal integrity (SI) and power integrity (PI) by using WideIO memory interface. Of course, the accuracy of TSV has demonstrated by measurement as well.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134128644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
No-polish elastic optical multifiber connector for optical interconnection 用于光互连的无抛光弹性光多纤连接器
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756095
T. Aoki, H. Muranaka, S. Aoki, K. Suematsu, M. Iwaya, M. Shiino
{"title":"No-polish elastic optical multifiber connector for optical interconnection","authors":"T. Aoki, H. Muranaka, S. Aoki, K. Suematsu, M. Iwaya, M. Shiino","doi":"10.1109/ICSJ.2013.6756095","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756095","url":null,"abstract":"An elastic optical multifiber connector compatible with a standard mechanically transferrable connector was realized. The elastic connector has N-shape folded frame parts which are elastically deformable of 100 μm. Physical contact connections between no-polish fibers and a film-waveguide were confirmed. The average insertion loss of the cables terminated at one side with an elastic connector shows 0.16 dB which is almost same as those terminated at both ends with mechanical transferrable connectors. The durability for 250 times mating/demating tests in a mid-plane connector housing were also confirmed. Furthermore, the laser-cleaved fiber facets have smooth surfaces and convex shapes like those of polished connectors. Using the connector and the process, physical contact connections between no-polish fibers were achieved.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127730474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Nondestructive observation of fatigue crack propagation process in some solder joints by synchrotron radiation X-ray micro-tomography 同步辐射x射线微层析成像对某些焊点疲劳裂纹扩展过程的无损观察
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756130
Hiroyuki Tsuritani, T. Sayama, Y. Okamoto, Takeshi Takayanagi, K. Uesugi, T. Mori
{"title":"Nondestructive observation of fatigue crack propagation process in some solder joints by synchrotron radiation X-ray micro-tomography","authors":"Hiroyuki Tsuritani, T. Sayama, Y. Okamoto, Takeshi Takayanagi, K. Uesugi, T. Mori","doi":"10.1109/ICSJ.2013.6756130","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756130","url":null,"abstract":"A synchrotron radiation X-ray micro-tomography system was applied to nondestructive visualization and evaluation of micro-crack propagation appearing as thermal fatigue damage in some solder joints. The fatigue crack propagation lifetime was accurately estimated on the basis of the three-dimensional crack images.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133703594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New ultra low CTE material to reduce the warpage of thinner PKG 新型超低CTE材料，减少较薄PKG的翘曲
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756125
T. Kotake, H. Murai, S. Takanezawa, M. Miyatake, M. Takekoshi, M. Ose
{"title":"New ultra low CTE material to reduce the warpage of thinner PKG","authors":"T. Kotake, H. Murai, S. Takanezawa, M. Miyatake, M. Takekoshi, M. Ose","doi":"10.1109/ICSJ.2013.6756125","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756125","url":null,"abstract":"Along with the advancement in miniaturizing of mobile devices, typified by smart phones and tablet PCs, the semiconductor PKG substrate installed in these devices is demanded to be thinner and higher in density. As one of the most innovative solutions, the PoP (package on package) technology, which has the three-dimensional construction, has been expanding rapidly in recent years. However, the thinner PKG substrate tends to warp at the assembly process and cause the decrease in the connection reliability. Therefore ultra low CTE (coefficient of thermal expansion) materials have been needed as a key solution for the reduction of the warpage for thinner PKG substrates. Recently, we have developed new ultra low CTE material named E-770G for next-generation semiconductor PKG substrate, applying new resin systems, featuring low shrinkage and low residual stress. In particular, E-770G has achieved ultra low CTE (X) of 1.8 ppm/°C which leads to significant reduction of the warpage. Furthermore, it has low dissipation factor at high frequencies (Df: 0.005 at 1 GHz). So it's also applicable to high speed PKG applications. Confirming the warpage property, we evaluated the warpage behavior of thinner PKG substrate before/after assembly process. E-770G showed the much lower warpage than the conventional ultra low CTE material.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"11 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121007343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Applied voltage dependence of hotspot location and temperature in power Si MOSFET 应用功率硅MOSFET中热点位置和温度的电压依赖性
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756107
R. Kibushi, T. Hatakeyama, S. Nakagawa, M. Ishizuka
{"title":"Applied voltage dependence of hotspot location and temperature in power Si MOSFET","authors":"R. Kibushi, T. Hatakeyama, S. Nakagawa, M. Ishizuka","doi":"10.1109/ICSJ.2013.6756107","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756107","url":null,"abstract":"In recent years, thermal problem of electronics has been serious, and accurate thermal design has been required. In conventional thermal design of power Si MOSFET, which is widely used semiconductor device for current control in a lot of area, uniform heat generation has been assumed, and designer has employed average temperature of power Si MOSFET. However, for more accurate thermal design, the non-uniform temperature distribution of power Si MOSFET should be considered. In this study, we performed electro-thermal analysis to investigate non-uniform temperature distribution of power Si MOSFET, and discussed applied voltage dependence of hotspot location and its temperature. The calculation results showed, although applied voltage dependence of hotspot temperature of power Si MOSFET is complex, hot spot appears almost the same location in any applied voltage condition.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"03 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128302686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Direct coupling of cavity-resonator-integrated guided-mode resonance filter to a single-mode optical fiber 腔-谐振腔-集成导模谐振滤波器与单模光纤的直接耦合
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756093
J. Inoue, K. Hatanaka, Yuki Iwata, K. Nishio, Y. Awatsuji, S. Ura, K. Kintaka
{"title":"Direct coupling of cavity-resonator-integrated guided-mode resonance filter to a single-mode optical fiber","authors":"J. Inoue, K. Hatanaka, Yuki Iwata, K. Nishio, Y. Awatsuji, S. Ura, K. Kintaka","doi":"10.1109/ICSJ.2013.6756093","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756093","url":null,"abstract":"A small-aperture guided-mode resonance filter was designed and fabricated. Characteristics of the filter directly coupled to a single-mode optical fiber were measured. A narrowband reflection spectrum of 1.3-nm full-width at half-maximum was demonstrated.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115449092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Warpage behavior in 2.5D package using Si-interposer 使用Si-interposer的2.5D封装中的翘曲行为
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756076
K. Hara, K. Murayama, Mitsuhiro Aizawa, M. Higashi
{"title":"Warpage behavior in 2.5D package using Si-interposer","authors":"K. Hara, K. Murayama, Mitsuhiro Aizawa, M. Higashi","doi":"10.1109/ICSJ.2013.6756076","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756076","url":null,"abstract":"Influence factors of warpage change during assembly process for 2.5D package using silicon-interposer were investigated. Mechanical properties of organic substrate have the dominant influence. In contrast, material properties of U.F. material have little impact.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122717184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Power distribution network design method based on frequency-dependent target impedance for jitter design of memory interface 基于频率相关目标阻抗的配电网存储接口抖动设计方法
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756114
Yasuhiro Ikeda, M. Toyama, S. Muraoka, Y. Uematsu, H. Osaka
{"title":"Power distribution network design method based on frequency-dependent target impedance for jitter design of memory interface","authors":"Yasuhiro Ikeda, M. Toyama, S. Muraoka, Y. Uematsu, H. Osaka","doi":"10.1109/ICSJ.2013.6756114","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756114","url":null,"abstract":"This paper proposes a PDN design method using frequency-dependent target impedance considering frequency properties of jitter sensitivity of the IO buffer to power supply noise and switching current profile. We confirmed that this design and the resulting jitter of the I/O interface attributable to power supply noise meet the target value of less than 5 %UI.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124053836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design, simulation, and process development for 2.5D TSV interposer for high performance processer packaging 用于高性能处理器封装的2.5D TSV中介器的设计，仿真和工艺开发
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756074
Xiaoli Ren, K. Xue, Feng Jiang, Qibing Wang, Ye Ping, Cheng Pang, Haiyan Liu, Cheng Xu, Daquan Yu, D. Shangguan
{"title":"Design, simulation, and process development for 2.5D TSV interposer for high performance processer packaging","authors":"Xiaoli Ren, K. Xue, Feng Jiang, Qibing Wang, Ye Ping, Cheng Pang, Haiyan Liu, Cheng Xu, Daquan Yu, D. Shangguan","doi":"10.1109/ICSJ.2013.6756074","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756074","url":null,"abstract":"TSV (Through Silicon Via) is regarded as the key enabling technology for 2.5D and 3D IC packaging solution. Si interposers with TSV have emerged as an excellent solution providing high wiring density interconnection, minimizing CTE mismatch to the Cu/low-k chip that is vulnerable to thermo-mechanical stresses, improving electrical performance and decreasing power consumption due to shorter interconnection from the chip to the substrate. This paper presents the design, simulation, and process development of a large TSV interposer for a 18×16 mm test chip with more than 9000 bumps on a flip chip ball grid array (BGA) package. The development of key fabrication steps for the interposer based on 8 inch wafer was supported by process simulation and mechanical stress analysis. The size of the developed interposers is 22×20×0.12 mm with 2 redistribution layers (RDL) on the top side and Cu/Sn pillar bumps on the underside. The assembly process for the TSV interposer and the large die was also developed.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129044515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Thermal reliability of Ag-8Au-3Pd alloy wire bonds Ag-8Au-3Pd合金焊丝键的热可靠性
2013 3rd IEEE CPMT Symposium Japan Pub Date : 2013-11-01 DOI: 10.1109/ICSJ.2013.6756121
Rui Guo, C. Yin, D. Mao, Ming Li, Zhong Lv, Hope Chiu
{"title":"Thermal reliability of Ag-8Au-3Pd alloy wire bonds","authors":"Rui Guo, C. Yin, D. Mao, Ming Li, Zhong Lv, Hope Chiu","doi":"10.1109/ICSJ.2013.6756121","DOIUrl":"https://doi.org/10.1109/ICSJ.2013.6756121","url":null,"abstract":"Ag-8Au-3Pd alloy wire has great potential of low-cost candidate for traditional gold wire interconnects. This study aims to light the behavior of degradation that took place in Ag-8Au-3Pd alloy wire bond interface. Two layers of intermetallic compound (IMC) at the Ag-8Au-3Pd/Al bond interface were observed by transmission electron microscopy (TEM). The specimens were annealed at 175°C in a closed oven for 24, 72, 168, 336 and 500 h in atmosphere respectively to reveal the evolution of IMC at interface. The high-temperature storage (HTS) test of Ag-8Au-3Pd/Al Ag-95Pd-5/Al and Ag-98Pd-2/Al interface was conducted for contrast. Interface evolution tracking by back scattered electron (BSE) imaging showed that after 336 h, the bonding interface began to fail. JEDEC standard of HTS test was successfully passed. Ag-8Au-3Pd wire showed great promise as an economical substitute for gold wire.","PeriodicalId":101667,"journal":{"name":"2013 3rd IEEE CPMT Symposium Japan","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132166467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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