2010 NASA/ESA Conference on Adaptive Hardware and Systems最新文献_第3页

Embedded system protection from software corruption 嵌入式系统保护，防止软件损坏

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546254

F. Wolff, Chris Papachristou, D. Weyer, W. Clay

引用次数: 7

Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications 空间应用中安全动态部分重构的SoCWire NoC方法的架构验证

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546220

B. Osterloh, H. Michalik, B. Fiethe, F. Bubenhagen

{"title":"Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications","authors":"B. Osterloh, H. Michalik, B. Fiethe, F. Bubenhagen","doi":"10.1109/AHS.2010.5546220","DOIUrl":"https://doi.org/10.1109/AHS.2010.5546220","url":null,"abstract":"With the current trend of the ever increasing detector coverage, more precise measurement results of an observed object in space are provided to the scientists. This trend implies also higher data rates and amount of data to be processed by Data Processing Units (DPUs). Classical ground processing steps need to be performed on-board of spacecrafts with the demand by the scientist to be adapted to mission specific requirement. With today high logic density SRAM-based FPGAs, proven solutions for space applications are provided and permit in-flight and dynamic partial reconfigurability in space. For such an enhanced system the system qualification has to be carefully considered to retain the achieved high reliability. With SEU induced errors and glitch effects during dynamic partial reconfiguration the system qualification in a bus-based architecture cannot be guaranteed. Therefore an enhanced architecture is required which provides guaranteed system qualification and supports a high performance DPU architecture. The Network-on-Chip (NoC) approach based SoCWire architecture has been developed to provide these enhanced design goals. This paper presents the SoCWire architecture verification, test and results for safe dynamic partial reconfiguration in space applications. Radiation induced errors and glitch-effects in SRAM-based FPGAs are described and the limitations of bus-based communication architectures are outlined. The NoC paradigm is introduced and its advantage for dynamic reconfigurable systems. The SoCWire architecture will be presented and results of the architecture verification are outlined.","PeriodicalId":101655,"journal":{"name":"2010 NASA/ESA Conference on Adaptive Hardware and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124473868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Formal modelling of a robust Wireless Sensor Network routing protocol 鲁棒无线传感器网络路由协议的形式化建模

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546247

K. Saghar, W. Henderson, D. Kendall, A. Bouridane

{"title":"Formal modelling of a robust Wireless Sensor Network routing protocol","authors":"K. Saghar, W. Henderson, D. Kendall, A. Bouridane","doi":"10.1109/AHS.2010.5546247","DOIUrl":"https://doi.org/10.1109/AHS.2010.5546247","url":null,"abstract":"Because of their low cost, small size, low resources and self-organizing nature a Wireless Sensor Network (WSN) is a potential solution in hostile environments including military applications. However, the broadcasting nature of radio transmission; their limited computing, power and communication resources; unattended and potentially hostile nature of the environment they operate in make WSNs prone to Denial of Service (DoS) attacks. Although many schemes have been proposed to address DoS attacks their effectiveness is yet to be proven. The traditional methods used (i.e. visual inspection, computer simulations and hardware implementations) can only detect errors but cannot verify that the whole system is error free. Therefore, new techniques to automatically determine the worst cases and hidden errors in WSNs are much desired. After an initial investigation using a formal verification which clearly shows that Arrive routing protocol is vulnerable to different DoS attacks, this paper proposes a method for its security. The finding contradicts the claim of the developers of Arrive that it is immune to black hole attacks. Several other DoS attacks were also found to be successful in Arrive routing protocol. The formal model generates the trace to confirm how an attack is possible in the protocol. However, it was found that INA attacks are addressed by Arrive protocol. To our best knowledge the results discussed in this paper have not been presented, proved or published before.","PeriodicalId":101655,"journal":{"name":"2010 NASA/ESA Conference on Adaptive Hardware and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124255463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 29

Ultimate design security in self-reconfiguring non-volatile environments 在自我重新配置的非易失性环境中的终极设计安全性

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546255

W. Adi, K. Benkrid

{"title":"Ultimate design security in self-reconfiguring non-volatile environments","authors":"W. Adi, K. Benkrid","doi":"10.1109/AHS.2010.5546255","DOIUrl":"https://doi.org/10.1109/AHS.2010.5546255","url":null,"abstract":"The technology of self-reconfiguring electronic units is increasingly deployed in many modern systems. As systems are designed by many parties and some parts of the technology could be classified, the need to secure VLSI cores in reconfigurable fabrics is a very serious demand in many applications. This paper demonstrates a novel use of reconfigurable technology to devise ultimate Intellectual Property (IP) protection of bitstream cores in non-volatile reconfigurable environments. The core protection mechanism is based on the use the secret cipher (SC) concept developed recently by the authors [1]. The SC concept is only feasible if non-volatile self-reconfiguring FPGA technology is used. Assuming that such technology would become widely available in the future, the proposed concept offers the ultimate security level with regards to non-invasive attacks. The paper presents a new secured IP exchange protocol using the SC concept initiated in a self-reconfiguring non-volatile FPGA technology. The paper presents a simple secured IP exchange scenario between IP owner and IP user by consulting a trusted authority which should certify the devices. The device manufacturer has no influence on the IP exchange process and is not required to participate in the security management. Many other exchange scenarios are possible.","PeriodicalId":101655,"journal":{"name":"2010 NASA/ESA Conference on Adaptive Hardware and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115522760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Adaptive radiation pattern optimization for antenna arrays by phase perturbations using particle swarm optimization 基于粒子群优化的相位摄动天线阵自适应辐射方向图优化

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546256

Virgilio Zúñiga, A. Erdogan, T. Arslan

引用次数: 33

Auto-reconfiguration on self-organized intelligent platform 自组织智能平台上的自动重构

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546243

K. Cheng, A. Zarezadeh, F. Mühlbauer, C. Tanougast, C. Bobda

引用次数: 10

Environment-based measurement planning for autonomous RTLS configuration 基于环境的自主RTLS配置测量规划

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546244

Thorsten Edelhäußer, M. Janiak, G. Kókai

引用次数: 1

Thermal-aware fault-tolerant system design with coarse-grained reconfigurable array architecture 基于粗粒度可重构阵列架构的热感知容错系统设计

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546249

Ganghee Lee, Kiyoung Choi

引用次数: 13

Design of an analog field programmable RC oscillator using a floating gate PFET 利用浮栅fet设计模拟现场可编程RC振荡器

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546235

G. Kapur, C. Markan

引用次数: 1

Adaptive and evolvable hardware security architectures 自适应和可进化的硬件安全架构

2010 NASA/ESA Conference on Adaptive Hardware and Systems Pub Date : 2010-06-15 DOI: 10.1109/AHS.2010.5546261

W. Adi, K. Benkrid

引用次数: 4