IEEE Journal on Flexible Electronics最新文献

{"title":"IEEE Journal on Flexible Electronics Publication Information","authors":"","doi":"10.1109/JFLEX.2026.3694634","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3694634","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11594988","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"E-Link: A 256-Ch Mini-Pedestal Connector for High-Density Soft Neural Interfaces","authors":"Tianyu Bai;Gen Li;Yongli Qi;Hui Fang","doi":"10.1109/JFLEX.2026.3692102","DOIUrl":"10.1109/JFLEX.2026.3692102","url":null,"abstract":"High-density thin-film neural interfaces face persistent packaging challenges at the electrode–electronics interface, where conventional rigid connectors impose high insertion forces, strict alignment requirements, and limited reusability. We present elastomeric link (E-Link), a modular 256-channel mini-pedestal connector designed to facilitate simplified, user-friendly assembly through an insertion-free, alignment-tolerant interface utilizing an elastomeric conductive interposer and a compliant threaded compression mechanism. Finite element analysis (FEA) and experimental validation confirm uniform contact stress across the <inline-formula> <tex-math>$16{,}times{,} 16$ </tex-math></inline-formula> interconnect array. The system achieves stable electrical performance, exhibiting contact impedances of 0.3–0.4 k<inline-formula> <tex-math>$Omega $ </tex-math></inline-formula>, an root mean square (rms) noise floor of <inline-formula> <tex-math>$2.68~pm ~0.46~mu $ </tex-math></inline-formula>V, and a connection yield exceeding 97% over 100 mating cycles. The detachable architecture reduces chronic head-mounted mass from 6.6 to 2.8 g while maintaining safe thermal operation (<inline-formula> <tex-math>$30.5~^{circ }$ </tex-math></inline-formula>C steady state) under a full 20 kHz sampling bandwidth. Design analysis further indicates scalability toward 1024-channel integration within the same 25-mm-diameter footprint by leveraging fine-pitch elastomeric conductive pillars. This work provides a robust and scalable connection solution for high-density flexible neural interfaces with broad application for bioelectronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"196-208"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148221477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Advances in Flexible Wearable Technologies for Drug Delivery","authors":"Yunlong Fan;Runyu Bai;Xufan Chen;Zike Huang;Ningjie Du;Kewang Nan","doi":"10.1109/JFLEX.2025.3592866","DOIUrl":"https://doi.org/10.1109/JFLEX.2025.3592866","url":null,"abstract":"Wearable drug delivery systems are crucial for advancing personalized and precision medicine. As flexible technologies continue to evolve, integrating these technologies with wearable drug delivery systems to optimize human–machine interface compatibility—thereby reducing user discomfort and enhancing drug efficacy—has emerged as a significant trend in their development. Flexible drug delivery systems (FDDSs) must not only consider the flexibility of the drug delivery interface but also address various design challenges as devices to fulfill the specific drug delivery requirements of different medications. This review categorizes and analyzes the key components of FDDS, including human–machine interfaces, drug storage, controlled drug release, and power supply, while comparing their advantages and limitations. Additionally, it summarizes the applications of FDDS in treating various diseases. Overall, this review highlights the immense potential of FDDS and offers valuable insights into the progress and prospects of this field.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"229-245"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Guest Editorial Special Issue on the Social Impact of the Internet of Medical Things: From Body Wearables to Brain Implants","authors":"Yuxin Liu;Paul R. Berger;John A. Rogers;Benjamin C. K. Tee;Damien Coyle;Katina Michael;Ketra Schmitt","doi":"10.1109/JFLEX.2026.3704807","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3704807","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"187-188"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11594436","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comprehensive Stability Analysis of Fully Transparent Low-Power Thin-Film Transistors: Role of Device Design and Electrical Parameters","authors":"Mukuljeet Singh Mehrolia;Ankit Verma;Abhishek Kumar Singh","doi":"10.1109/JFLEX.2025.3611884","DOIUrl":"https://doi.org/10.1109/JFLEX.2025.3611884","url":null,"abstract":"This article states the simulation of amorphous-indium gallium zinc oxide (a-IGZO)-based thin-film transistor (TFT) using the Silvaco-Atlas tool, which is operated at a low voltage of 1.5 V. In this TFT, zirconium dioxide (ZrO₂) acts as a gate dielectric, and indium zinc oxide (IZO) is utilized as electrodes for the gate, source, and drain terminal. This simulated TFT exhibits excellent performance parameters such as a small threshold voltage (<inline-formula> <tex-math>$V_{text {TH}}$ </tex-math></inline-formula>) of 0.21 V, mobility (<inline-formula> <tex-math>$mu _{n}$ </tex-math></inline-formula>) of <inline-formula> <tex-math>$- 8.37~text {cm}^{2}/mathrm {V-s}$ </tex-math></inline-formula>, a subthreshold swing (SS) of <inline-formula> <tex-math>$- 84~text {mV} /text {decade}$ </tex-math></inline-formula>, and a high <sc>on–off</small> ratio <inline-formula> <tex-math>$-{10}^{6}$ </tex-math></inline-formula>. In addition to the estimation of performance parameters, the hysteresis curve is also evaluated for gate–source voltage (<inline-formula> <tex-math>$V_{text {GS}}$ </tex-math></inline-formula>), which varies from 0 to 1.5 V and the same in the reverse manner. The impact of different parameters, such as variable thickness of the dielectric layer, active layer, and different magnitudes of fixed charge density, is also observed in the plotting of the hysteresis curve and in the calculation of <inline-formula> <tex-math>$Delta V_{text {TH}}$ </tex-math></inline-formula>. From all the cases, it has been concluded that for an oxide thickness of 40 nm and an active layer thickness of 30 nm, the change is very small in <inline-formula> <tex-math>$Delta V_{text {TH}}$ </tex-math></inline-formula>, that is, 0.0003, 0.0015, 0.003, “0.006,” “0.009,” “0.016,” and “0.023 V” for stress times of “0,” “600,” “1200,” “1800,” “3600,” “5400,” and “7200 s.” The minimal variations in threshold voltage across different stress durations confirm the enhanced positive bias stress (PBS) stability of the a-IGZO low-voltage TFT device, highlighting its potential for future low-power and flexible electronic applications.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"189-195"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"ST-CoG-XAI: A Spectrotemporal Contrastive Generation Foundation Model for Explainable EEG Decoding","authors":"Jiaqi Ding;He Wang;Changsheng Wu;Yiyuan Yang","doi":"10.1109/JFLEX.2025.3620380","DOIUrl":"https://doi.org/10.1109/JFLEX.2025.3620380","url":null,"abstract":"Wearable electroencephalography (EEG) on flexible substrates enables continuous neuromonitoring but violates the fixed-montage assumption of conventional decoders: electrode geometry varies across devices, channels intermittently disappear, and task-relevant biomarkers drift over spectral and spatial dimensions. We present <italic>ST-CoG-XAI</i>, a unified framework that delivers accurate and intrinsically interpretable decoding under these nonstationary conditions. The model begins with dual-stream encoder: an asymmetric convolutional network (ACN) converts time-domain windows into patch tokens, whereas a graph neural network (GNN) tokenizes frequency-band connectomes. These two token streams are fused and processed by a unified spectral–spatial–temporal synergy criss-cross transformer (UniSST-CCT) whose multihead attention is decomposed into spatial, temporal, and spectral groups, capturing cross-axis dependencies at only a constant-factor increase in complexity. Prior to supervision, the encoder is exposed to large unlabeled data through spectrotemporal contrastive generation (CoG), which alternates three mutually exclusive reconstruction tasks to align temporal and spectral representations. After CoG pretraining, supervised fine-tuning activates a weight-sharing second forward pass whose DeepLIFT-guided reattention explainable artificial intelligence (XAI) refines the encoder while preserving clinically meaningful patterns. Evaluated on seven clinical Brain–computer interface (BCI) benchmarks, covering neurodegenerative disorders, epilepsy detection, sleep staging, and event-related classification, ST-CoG-XAI matches or surpasses published state-of-the-art results, confirming robust generalization not only across heterogeneous EEG montages but also when operating with a limited or partial set of channels.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 6","pages":"217-228"},"PeriodicalIF":0.0,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Guest Editorial Cross Society Special Issue (2025 IFETC and ISCAS) on Flexible Hybrid Electronics: Next-Generation Circuits and Systems for Wearable Intelligence","authors":"Tong Ge;Mao Wei;Jian Zhao;Mengmeng Li;Jun Yu;Ta-Ya Chu","doi":"10.1109/JFLEX.2026.3676907","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3676907","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"93-94"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11493914","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of Low-Power DFFs With Unipolar Thin-Film Transistor","authors":"Shubham Ranjan;Czang-Ho Lee;Pranav Gavirneni;William S. Wong;Manoj Sachdev","doi":"10.1109/JFLEX.2026.3658025","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3658025","url":null,"abstract":"Thin-film transistors (TFTs) have become the foundation of modern flexible and large-area electronics, enabling applications such as displays, wearable sensors, and IoT systems. However, realizing energy-efficient sequential circuits with unipolar TFTs remains challenging due to limited voltage swing and substantial direct-path current. This work presents the design and analysis of three low-power D flip-flops (DFFs), a dynamic TFT flip-flop (DTFF), and two generations of static TFT flip-flop (STFF-I and STFF-II), implemented using unipolar amorphous silicon (a-Si:H) TFTs. The first-generation STFF-I DFF, fabricated and measured on glass and flexible substrates, achieves a 79.8% reduction in total power relative to a conventional design. The STFF-II DFF incorporates optimized feedback control to achieve full-swing static operation with reduced switching delay. The DTFF design uses dynamic bootstrap-assisted feedback to suppress direct-path current while maintaining a compact area. All circuits were benchmarked in simulation against prior TFT-based DFFs and evaluated in subsystem-level implementations, including a 3-bit counter, frequency divider, and TFT-based scan-chain structures. The proposed DTFF achieves up to 77% lower power and 69% lower power-delay-product (PDP) than state-of-the-art designs. These results establish the DTFF, STFF-I, and STFF-II designs as compact, energy-efficient sequential building blocks for next-generation flexible and large-area electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"116-126"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-Power Unipolar TFT Circuits for Flexible Electronics","authors":"Shubham Ranjan;Czang-Ho Lee;William S. Wong;Manoj Sachdev","doi":"10.1109/JFLEX.2026.3659092","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3659092","url":null,"abstract":"The growing demand for affordable, flexible, and energy-efficient electronics for displays, wearables, and Internet of Things (IoT) systems has renewed interest in thin-film transistor (TFT) circuits. However, most TFT technologies are unipolar, posing challenges for complex logic implementation due to restricted output swing and excessive direct-path current. In this work, we present a comprehensive design methodology for low-power digital circuits using unipolar TFTs, addressing both static power dissipation and robustness under mechanical strain. We first demonstrate low-power logic gates and D flip-flops (DFFs) that significantly suppress direct-path current while achieving full-swing outputs. Circuits were fabricated on both glass and flexible substrates, and their performance under tensile and compressive bending was experimentally validated. Results show that the proposed circuits reduce power consumption by more than 55% compared to other designs, with negligible degradation under bending stress. To evaluate system-level applicability, a bit-serial arithmetic logic unit (ALU) was simulated as a benchmark, demonstrating power savings up to 45% compared to state-of-the-art designs. These results establish a practical pathway for integrating low-power logic and sequential circuits directly on flexible backplanes, reducing reliance on off-panel CMOS and enabling future generations of low-power displays, IoT devices, and conformable electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"134-144"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Photolithography-Compatible Low-Voltage OTFT Enabled by a Trilayer Dielectric Design With PDK-Compatible Development","authors":"Taoming Guo;Yaojie Zheng;Ran Wang;Teng Yi;Chen Jiang","doi":"10.1109/JFLEX.2026.3658303","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3658303","url":null,"abstract":"Organic thin-film circuit design requires not only high-performance transistors but also reproducible device behavior that can be captured in compact models and supported by a process design kit (PDK). Existing low-voltage organic thin-film transistors (OTFTs) technologies often rely on shadow-mask or printed process, where coarse patterning and alignment variability hinder device uniformity, parasitic management, and integration scalability. This work presents a photolithography-compatible OTFT platform based on a trilayer dielectric stack that achieves uniform, low-voltage transistor operation with a mobility of <inline-formula> <tex-math>$0.87~pm ~0.07$ </tex-math></inline-formula> cm²V<inline-formula> <tex-math>${}^{-{1}}$ </tex-math></inline-formula> s<inline-formula> <tex-math>${}^{-{1}}$ </tex-math></inline-formula>, a threshold-voltage of <inline-formula> <tex-math>$0.96~pm ~0.13$ </tex-math></inline-formula> V and an 87% functional yield across the substrate. These reproducible device characteristics enable the extraction of a calibrated Level-62 RPI poly-TFT compact model, which is integrated into a complete PDK with defined layers, routing modules, and verified design-rule check (DRC)/layout-versus-schematic (LVS) rules. Circuit demonstrations, including inverters, nand gates, a leader–follower D-flip-flop (DFF), and a full adder, reproduce the expected Boolean functionality under low-voltage operation. The results establish a unified workflow that links lithography-defined OTFT fabrication with PDK-compatible modeling and circuit-level simulation, providing a foundation for scalable organic thin-film electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"145-150"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}