IEEE Journal on Flexible Electronics最新文献

{"title":"Guest Editorial Cross Society Special Issue (2025 IFETC and ISCAS) on Flexible Hybrid Electronics: Next-Generation Circuits and Systems for Wearable Intelligence","authors":"Tong Ge;Mao Wei;Jian Zhao;Mengmeng Li;Jun Yu;Ta-Ya Chu","doi":"10.1109/JFLEX.2026.3676907","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3676907","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"93-94"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11493914","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of Low-Power DFFs With Unipolar Thin-Film Transistor","authors":"Shubham Ranjan;Czang-Ho Lee;Pranav Gavirneni;William S. Wong;Manoj Sachdev","doi":"10.1109/JFLEX.2026.3658025","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3658025","url":null,"abstract":"Thin-film transistors (TFTs) have become the foundation of modern flexible and large-area electronics, enabling applications such as displays, wearable sensors, and IoT systems. However, realizing energy-efficient sequential circuits with unipolar TFTs remains challenging due to limited voltage swing and substantial direct-path current. This work presents the design and analysis of three low-power D flip-flops (DFFs), a dynamic TFT flip-flop (DTFF), and two generations of static TFT flip-flop (STFF-I and STFF-II), implemented using unipolar amorphous silicon (a-Si:H) TFTs. The first-generation STFF-I DFF, fabricated and measured on glass and flexible substrates, achieves a 79.8% reduction in total power relative to a conventional design. The STFF-II DFF incorporates optimized feedback control to achieve full-swing static operation with reduced switching delay. The DTFF design uses dynamic bootstrap-assisted feedback to suppress direct-path current while maintaining a compact area. All circuits were benchmarked in simulation against prior TFT-based DFFs and evaluated in subsystem-level implementations, including a 3-bit counter, frequency divider, and TFT-based scan-chain structures. The proposed DTFF achieves up to 77% lower power and 69% lower power-delay-product (PDP) than state-of-the-art designs. These results establish the DTFF, STFF-I, and STFF-II designs as compact, energy-efficient sequential building blocks for next-generation flexible and large-area electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"116-126"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-Power Unipolar TFT Circuits for Flexible Electronics","authors":"Shubham Ranjan;Czang-Ho Lee;William S. Wong;Manoj Sachdev","doi":"10.1109/JFLEX.2026.3659092","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3659092","url":null,"abstract":"The growing demand for affordable, flexible, and energy-efficient electronics for displays, wearables, and Internet of Things (IoT) systems has renewed interest in thin-film transistor (TFT) circuits. However, most TFT technologies are unipolar, posing challenges for complex logic implementation due to restricted output swing and excessive direct-path current. In this work, we present a comprehensive design methodology for low-power digital circuits using unipolar TFTs, addressing both static power dissipation and robustness under mechanical strain. We first demonstrate low-power logic gates and D flip-flops (DFFs) that significantly suppress direct-path current while achieving full-swing outputs. Circuits were fabricated on both glass and flexible substrates, and their performance under tensile and compressive bending was experimentally validated. Results show that the proposed circuits reduce power consumption by more than 55% compared to other designs, with negligible degradation under bending stress. To evaluate system-level applicability, a bit-serial arithmetic logic unit (ALU) was simulated as a benchmark, demonstrating power savings up to 45% compared to state-of-the-art designs. These results establish a practical pathway for integrating low-power logic and sequential circuits directly on flexible backplanes, reducing reliance on off-panel CMOS and enabling future generations of low-power displays, IoT devices, and conformable electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"134-144"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Photolithography-Compatible Low-Voltage OTFT Enabled by a Trilayer Dielectric Design With PDK-Compatible Development","authors":"Taoming Guo;Yaojie Zheng;Ran Wang;Teng Yi;Chen Jiang","doi":"10.1109/JFLEX.2026.3658303","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3658303","url":null,"abstract":"Organic thin-film circuit design requires not only high-performance transistors but also reproducible device behavior that can be captured in compact models and supported by a process design kit (PDK). Existing low-voltage organic thin-film transistors (OTFTs) technologies often rely on shadow-mask or printed process, where coarse patterning and alignment variability hinder device uniformity, parasitic management, and integration scalability. This work presents a photolithography-compatible OTFT platform based on a trilayer dielectric stack that achieves uniform, low-voltage transistor operation with a mobility of <inline-formula> <tex-math>$0.87~pm ~0.07$ </tex-math></inline-formula> cm²V<inline-formula> <tex-math>${}^{-{1}}$ </tex-math></inline-formula> s<inline-formula> <tex-math>${}^{-{1}}$ </tex-math></inline-formula>, a threshold-voltage of <inline-formula> <tex-math>$0.96~pm ~0.13$ </tex-math></inline-formula> V and an 87% functional yield across the substrate. These reproducible device characteristics enable the extraction of a calibrated Level-62 RPI poly-TFT compact model, which is integrated into a complete PDK with defined layers, routing modules, and verified design-rule check (DRC)/layout-versus-schematic (LVS) rules. Circuit demonstrations, including inverters, nand gates, a leader–follower D-flip-flop (DFF), and a full adder, reproduce the expected Boolean functionality under low-voltage operation. The results establish a unified workflow that links lithography-defined OTFT fabrication with PDK-compatible modeling and circuit-level simulation, providing a foundation for scalable organic thin-film electronics.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"145-150"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design and Implementation of N-Type-Only LTPS-TFT Voltage Reference Circuits for Flexible Electronics","authors":"Chao Wang;Yiyang Chen;Wangzilu Lu;Jiajie Huang;Yuting Hou;Jian Zhao;Hui Wang;Chen Jiang;Yongfu Li","doi":"10.1109/JFLEX.2026.3668761","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3668761","url":null,"abstract":"This article details the design and simulation-based evaluation of three distinct <inline-formula> <tex-math>$N$ </tex-math></inline-formula>-type-only low-temperature polycrystalline-silicon thin-film transistor (LTPS-TFT) voltage reference circuits, tailored for the specific demands of flexible electronic systems. Addressing the inherent design challenges in TFT technology, these circuits employ a common strategy: generating a current with a negative temperature coefficient to compensate for proportional-to-absolute-temperature (PTAT) voltage characteristics. Comprehensive post-layout and statistical Monte Carlo (MC) simulation results highlight that the first of the proposed configurations achieves superior performance, exhibiting a temperature coefficient (TC) of 34.03 ppm/°C, a line sensitivity of 0.61%/V, and a power supply rejection ratio (PSRR) of −42.34 dB. This study presents new circuit-level approaches for achieving reliable voltage references in flexible applications, thereby advancing the development of high-performance, flexible electronic systems.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"107-115"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Journal on Flexible Electronics Publication Information","authors":"","doi":"10.1109/JFLEX.2026.3678445","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3678445","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11493911","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Digital Design Techniques for IGZO-Based Circuits","authors":"Sven Baerten;Yari Nowicki;Jelle Biesmans;Kris Myny","doi":"10.1109/JFLEX.2026.3658022","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3658022","url":null,"abstract":"This article explores two optimization strategies for digital circuits based on indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs). The first method focuses on clock tree synthesis (CTS) and its impact on performance. To evaluate the effectiveness of CTS, a 32-bit counter incorporating a Brent–Kung adder (BKA) was designed and fabricated. Implementing the clock tree improved the maximum operating frequency up to 50%. The second optimization strategy is a mixed standard cell library that integrates both high-performance (HP) and low-power (LP) cells, using a two-stage resistor-load logic (2RLL) topology. The HP cells will be placed along the critical paths of the integrated circuits (ICs), while LP cells will be used in noncritical areas. To validate this approach, two MOS 6502 microprocessor versions were developed: one with only HP cells and another with the mixed library. Our findings indicate a threefold reduction in power consumption when employing the mixed library during the digital flow at comparable clock speeds. In addition, we developed what is, to our knowledge, the fastest IGZO-TFT microprocessor reported to date, achieving a clock frequency of 295 kHz, and the lowest power-consuming microprocessor in this technology, marking the first IGZO-CPU to operate in the sub-mW range at <inline-formula> <tex-math>$580~mu $ </tex-math></inline-formula>W.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"127-133"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11363401","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Hybrid EOG System Featuring Flexible a-IGZO TFTs and a 180 nm CMOS IC","authors":"Mohammad Zulqarnain;Stefano Stanzione;Elisabetta Peri;Steve Smout;Myriam Willegems;Pieter Harpe;Kris Myny;Eugenio Cantatore","doi":"10.1109/JFLEX.2026.3669472","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3669472","url":null,"abstract":"Flexible wearable sensors are becoming increasingly popular due to their capability to monitor physiological signals while ensuring high user comfort. Wearable sensors built using only flexible electronics result in inferior system performance due to the inherent limitations of flexible technologies. Flexible hybrid electronics (FHEs) combine the strengths of flexible technologies (low cost, larger area coverage, and user comfort) with the high performance and energy efficiency of silicon-integrated circuits (Si ICs). Here, an FHE system is described that addresses the challenge of system functions partitioning between flexible and Si subsystems. The presented design approach is applied in this work to a multichannel electro-oculography (EOG) system, but can be expanded to various FHE application domains. The proof of concept fully integrated eight-channel FHE EOG system exploits a front-end in a-IGZO TFT technology, interfaced with a custom Si IC that supports the front-end and provides conversion of the acquired signals to the digital domain. In this way, the low cost, flexible form factor, and the large area character of the flexible thin-film transistor (TFT) technology are leveraged, while exploiting at the same time the accuracy, computational capability, and energy efficiency of the Si IC. We propose a hybrid high-pass filter (hHPF) as an interface between the electrodes and the front-end, whereby TFTs and capacitors on foil are controlled by the Si IC. The hybrid approach exploits the capabilities of flexible electronics to bring functionality close to the electrodes and its potential to cope with a high number of sensor channels, with the better precision of CMOS, enabling a fully integrated filter without discrete components. The TFT front-end converts the input signal voltages to a pulsewidth-modulated (PWM) representation, which is then quantized in the Si IC, to provide a digital output. The Si IC enables conversion to the digital domain with much higher efficiency compared to state-of-the-art TFT solutions. The digital output is further used in an algorithm for feature extraction and classification to detect the desired signals. The experimental electrical characterization of the system demonstrates an input-referred noise of &lt;inline-formula&gt; &lt;tex-math&gt;$6.68~mu $ &lt;/tex-math&gt;&lt;/inline-formula&gt;&lt;inline-formula&gt; &lt;tex-math&gt;$mathrm{V}_{rms}$ &lt;/tex-math&gt;&lt;/inline-formula&gt; in a 1–30 Hz band, with a chopping frequency of 1 kHz. The input impedance offered by the integrated hHPF is 6.88 G&lt;inline-formula&gt; &lt;tex-math&gt;$Omega $ &lt;/tex-math&gt;&lt;/inline-formula&gt; at 0.089 Hz (with multiplexing disabled). The total power consumption per channel is &lt;inline-formula&gt; &lt;tex-math&gt;$84~mu $ &lt;/tex-math&gt;&lt;/inline-formula&gt;W. In vivo experiments have also been performed against a gold standard (a commercial bio-potential amplifier) to confirm a faithful representation of the eye activities. The signals acquired during in vivo experiments are successfully classified usin","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 4","pages":"95-106"},"PeriodicalIF":0.0,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147734751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Journal on Flexible Electronics Publication Information","authors":"","doi":"10.1109/JFLEX.2026.3668892","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3668892","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 3","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2026-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11433224","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147429308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Journal on Flexible Electronics Publication Information","authors":"","doi":"10.1109/JFLEX.2026.3657928","DOIUrl":"https://doi.org/10.1109/JFLEX.2026.3657928","url":null,"abstract":"","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"5 2","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2026-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11373675","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146122773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}