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2019 Symposium on VLSI Technology最新文献

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Record-High Performance Trantenna based on Asymmetric Nano-Ring FET for Polarization-Independent Large-Scale/Real-Time THz Imaging 基于非对称纳米环场效应管的破纪录高性能太赫兹成像技术
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776567
E. Jang, M. Ryu, R. Patel, S. H. Ahn, H. J. Jeon, K. Han, K. R. Kim
{"title":"Record-High Performance Trantenna based on Asymmetric Nano-Ring FET for Polarization-Independent Large-Scale/Real-Time THz Imaging","authors":"E. Jang, M. Ryu, R. Patel, S. H. Ahn, H. J. Jeon, K. Han, K. R. Kim","doi":"10.23919/VLSIT.2019.8776567","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776567","url":null,"abstract":"We demonstrate a record-high performance monolithic trantenna (transistor-antenna) using 65-nm CMOS foundry in the field of a plasmonic terahertz (THz) detector. By applying ultimate structural asymmetry between source and drain on a ring FET with source diameter $(d_{text{S}})$ scaling from 30 to $0.37mu text{m}$, we obtained 180 times more enhanced photoresponse $(Delta u)$ in on-chip THz measurement. Through free-space THz imaging experiments, the conductive drain region of ring FET itself showed a frequency sensitivity with resonance frequency at 0.12 THz in $0.09sim 0.2$ THz range and polarization-independent imaging results as an isotropic circular antenna. Highly-scalable and feeding line-free monolithic trantenna enables a high-performance THz detector with responsivity of 8.8 kV/$W$ and NEP of $3.36text{pW}/text{Hz}^{05}$ at the target frequency.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"1 1","pages":"T160-T161"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86993384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
2019 Symposium on VLSI Technology Digest of Technical Papers 2019年VLSI技术研讨会技术论文文摘
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/vlsit.2019.8776489
{"title":"2019 Symposium on VLSI Technology Digest of Technical Papers","authors":"","doi":"10.23919/vlsit.2019.8776489","DOIUrl":"https://doi.org/10.23919/vlsit.2019.8776489","url":null,"abstract":"","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"486 4","pages":""},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72584793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Circuit and systems based on advanced MRAM for near future computing applications 基于先进MRAM的电路和系统，用于近期的计算应用
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776504
S. Fujita, S. Takaya, S. Takeda, K. Ikegami
{"title":"Circuit and systems based on advanced MRAM for near future computing applications","authors":"S. Fujita, S. Takaya, S. Takeda, K. Ikegami","doi":"10.23919/VLSIT.2019.8776504","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776504","url":null,"abstract":"Recently MRAM technologies have been intensively developed. This paper describes novel solutions using advanced MRAM for near future computing applications. Three beneficial applications with MRAM are presented: energy saving, data reliability and performance improvement.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"32 1","pages":"C278-C279"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91202212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Low-Power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets 集成金属纳米片低功率和ppm级气体分子检测
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776552
T. Tanaka, K. Tabuchi, K. Tatehora, Y. Shiiki, S. Nakagawa, T. Takahashi, R. Shimizu, H. Ishikuro, T. Kuroda, T. Yanagida, K. Uchida
{"title":"Low-Power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets","authors":"T. Tanaka, K. Tabuchi, K. Tatehora, Y. Shiiki, S. Nakagawa, T. Takahashi, R. Shimizu, H. Ishikuro, T. Kuroda, T. Yanagida, K. Uchida","doi":"10.23919/VLSIT.2019.8776552","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776552","url":null,"abstract":"Ppm-level hydrogen and ammonia in air were recognized by low-power, integrated sensors consisting of catalytic metal nanosheets. Thermal energy necessary for catalytic reactions were given by Joule heating not by external heaters. The ther-mal-aware design of sensors reduces the power consumption to 0.14 mW. The low-power and small-area properties enable large-scale, on-chip integration of molecular sensors, which will be useful in IoT era. A sensor array was successfully connected to a platform with wireless connectivity.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"14 1","pages":"T158-T159"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82924874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Computational memory-based inference and training of deep neural networks 基于计算记忆的深度神经网络推理与训练
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776518
A. Sebastian, I. Boybat, M. Dazzi, I. Giannopoulos, V. Jonnalagadda, V. Joshi, G. Karunaratne, B. Kersting, R. Khaddam-Aljameh, S. Nandakumar, A. Petropoulos, C. Piveteau, T. Antonakopoulos, B. Rajendran, M. L. Gallo, E. Eleftheriou
{"title":"Computational memory-based inference and training of deep neural networks","authors":"A. Sebastian, I. Boybat, M. Dazzi, I. Giannopoulos, V. Jonnalagadda, V. Joshi, G. Karunaratne, B. Kersting, R. Khaddam-Aljameh, S. Nandakumar, A. Petropoulos, C. Piveteau, T. Antonakopoulos, B. Rajendran, M. L. Gallo, E. Eleftheriou","doi":"10.23919/VLSIT.2019.8776518","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776518","url":null,"abstract":"In-memory computing is an emerging computing paradigm where certain computational tasks are performed in place in a computational memory unit by exploiting the physical attributes of the memory devices. Here, we present an overview of the application of in-memory computing in deep learning, a branch of machine learning that has significantly contributed to the recent explosive growth in artificial intelligence. The methodology for both inference and training of deep neural networks is presented along with experimental results using phase-change memory (PCM) devices.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"22 1","pages":"T168-T169"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81686939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Channel Strain Dependence of Tinv in Strained Si and Sil-xGexFETs: Internal Strain-induced Modification of Chemical Oxidation 应变Si和Si - xgeexet中Tinv的通道应变依赖性:内部应变诱导的化学氧化改性
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776577
Choonghyun Lee, S. Mochizuki, Xin He Miao, Juntao Li, R. Southwick
{"title":"Channel Strain Dependence of Tinv in Strained Si and Sil-xGexFETs: Internal Strain-induced Modification of Chemical Oxidation","authors":"Choonghyun Lee, S. Mochizuki, Xin He Miao, Juntao Li, R. Southwick","doi":"10.23919/VLSIT.2019.8776577","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776577","url":null,"abstract":"Self-limiting chemical oxidation behaviors on SiGe channels with biaxial and uniaxial strain are studied to understand the role of the internal channel strain in the interfacial layer (IL) formation. Biaxial strain accelerates chemical oxidation on Si and SiGe regardless of Ge content in the channel, forming a thicker IL in planar FETs. On the other hand, chemical oxidation is not sensitive to uniaxial strain thanks to the less strain in the out-of-plane direction, forming a thinner IL in FinFETs. The universal relationship of Tinv and channel strain from both planar FETs and FinFETs is discussed.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"83 1","pages":"T98-T99"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90766348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Custom Silicon and Sensors Developed for a 2nd Generation Mixed Reality User Interface 为第二代混合现实用户界面开发的定制硅和传感器
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776505
Patrick O'Connor, Casey Meekhof, C. McBride, Christopher Mei, C. Bamji, Dave Rohn, Hakon Strande, J. Forrester, M. Fenton, Ryan Haraden, Tolga Ozguner, Travis Perry
{"title":"Custom Silicon and Sensors Developed for a 2nd Generation Mixed Reality User Interface","authors":"Patrick O'Connor, Casey Meekhof, C. McBride, Christopher Mei, C. Bamji, Dave Rohn, Hakon Strande, J. Forrester, M. Fenton, Ryan Haraden, Tolga Ozguner, Travis Perry","doi":"10.23919/VLSIT.2019.8776505","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776505","url":null,"abstract":"Microsoft Hololens 2, like its predecessor, is an untethered holographic mixed reality (MR) headset that transforms the way we communicate, create, and explore. Hololens 2 advances MR ergonomics, intuitive interactions, and immersion. We describe the custom sensors and compute silicon developed to give hands-free user control of the headset and applications. With 3D Time of Flight (TOF) depth sensing, eye tracking and spatial array microphones, working with low power compute blocks aggregated in a custom ASIC, the hardware enables a comfortable, low latency user interface that sets the user free to focus on their work. We conclude with a look at how these building blocks can enable further innovation in the Intelligent Edge.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"8 1","pages":"C186-C187"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87053943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 10mm3Light-Dose Sensing IoT2 System with 35-to-339nW 10-to-300klx Light-Dose-to-Digital Converter 10mm3光剂量传感IoT2系统与35- 339nw 10- 300klx光剂量-数字转换器
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776556
Inhee Lee, Eunseong Moon, Yejoong Kim, J. Phillips, D. Blaauw
{"title":"A 10mm3Light-Dose Sensing IoT2 System with 35-to-339nW 10-to-300klx Light-Dose-to-Digital Converter","authors":"Inhee Lee, Eunseong Moon, Yejoong Kim, J. Phillips, D. Blaauw","doi":"10.23919/VLSIT.2019.8776556","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776556","url":null,"abstract":"This paper presents a <tex>$10text{mm}^{3}$</tex> Intemet-of-Tiny-Things <tex>$(text{IoT}^{2})$</tex> system that measures light dose using custom photovoltaic cells and a light-dose-to-digital converter (LDDC). The LDDC nulls diode leakage for temperature stability and creates headroom without power overhead by dual forward-biased photovoltaic cells. It also adaptively updates the current mirror ratio and accumulation weighting factor for a low, near-constant power consumption. The system can operate energy-autonomously at <tex>$> 5001text{x}$</tex> light level. The LDDC achieves a <tex>$3sigma$</tex> inaccuracy of <tex>$pm$</tex> 3.8% and <tex>$sigma/mu$</tex> of 2.4% across a wide light intensity range from 10lx to <tex>$300text{klx}$</tex> while consuming only <tex>$35-339text{nW}$</tex>","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"13 1","pages":"C180-C181"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85530349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High-speed and Ultra-low Power IoT One-chip (MCU + Connectivity-chip) on a Robust 28-nm Embedded Flash Process 基于28纳米嵌入式闪存工艺的高速超低功耗物联网单芯片(MCU +连接芯片)
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776557
Changmin Jeon, Jongsung Woo, Kyongsik Yeom, Minji Seo, Eunmi Hong, Youngcheon Jeong, Sangjin Lee, Hongkook Min, DalHwan Kim, Hyun-Yong Lee, Soomin Cho, Myeonghee Oh, Jisung Kim, Hyosang Lee, Jinchul Park, Cheol Kim, Hyukjun Sung, Se-Joon Yoon, Joonsuk Kim, Yong Kyu Lee, K. Park, G. Jeong, J. Yoon, E. Jung
{"title":"High-speed and Ultra-low Power IoT One-chip (MCU + Connectivity-chip) on a Robust 28-nm Embedded Flash Process","authors":"Changmin Jeon, Jongsung Woo, Kyongsik Yeom, Minji Seo, Eunmi Hong, Youngcheon Jeong, Sangjin Lee, Hongkook Min, DalHwan Kim, Hyun-Yong Lee, Soomin Cho, Myeonghee Oh, Jisung Kim, Hyosang Lee, Jinchul Park, Cheol Kim, Hyukjun Sung, Se-Joon Yoon, Joonsuk Kim, Yong Kyu Lee, K. Park, G. Jeong, J. Yoon, E. Jung","doi":"10.23919/VLSIT.2019.8776557","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776557","url":null,"abstract":"Based on robust 28-nm embedded flash (eFlash) process, IoT One-chip for high-speed and low power applications which MCU-chip (10Mb eFlash) and connectivity-chip (BLE/Zigbee) are integrated for the first time. By introducing new devices on 28-nm low-power eFlash process, high-speed ($> 40text{MHz}$ random read), ultra-low power $(< 3text{uA}$ sleep mode current, 10/13mA RF current at $text{Tx}/text{Rx}$ mode) and robust reliability $(-40sim 125^{text{o}}text{C}$ stable operation, $100text{K}$ cycle endurance, 150C/RT retention up to 200K hours) are achieved. LDD-first IO transistor with low Vth (~0.5V) for low-Vdd (~1.0V) operation [1] and ultra-low leakage (ULL) SRAM bit-cell (0.1x vs. normal) supporting low sleep mode chip current are applied to extend battery life-time. Stable endurance and high (/low)-temperature retention after cycling stress are achieved by robust split-gate type eFlash cell.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"31 1","pages":"T114-T115"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89561431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Monte Carlo model of resistance evolution in embedded PCM with Ge-rich GST 富ge GST嵌入式PCM电阻演化的蒙特卡罗模型
2019 Symposium on VLSI Technology Pub Date : 2019-06-01 DOI: 10.23919/VLSIT.2019.8776491
O. Melnic, M. Borghi, E. Palumbo, P. Zuliani, R. Annunziata, D. Ielmini
{"title":"Monte Carlo model of resistance evolution in embedded PCM with Ge-rich GST","authors":"O. Melnic, M. Borghi, E. Palumbo, P. Zuliani, R. Annunziata, D. Ielmini","doi":"10.23919/VLSIT.2019.8776491","DOIUrl":"https://doi.org/10.23919/VLSIT.2019.8776491","url":null,"abstract":"This work presents an optimized model for resistance evolution in PCM cells with Ge-rich GeSbTe (GST) alloy as active material. Unlike conventional Ge2Sb2 Te5, the low-resistance (set) state of Ge-rich GST shows a resistance drift to high resistance R, similar to the high resistance (reset) state, which could be a potential risk for data reliability. We develop a Monte Carlo (MC) model which predicts the time evolution of R at the statistical level of a memory array at various temperature T. The model is validated against variable temperature annealing, such as the soldering profile in embedded PCM, supporting the good reliability of Ge-rich GST at high T.","PeriodicalId":6752,"journal":{"name":"2019 Symposium on VLSI Technology","volume":"81 1","pages":"T64-T65"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76139720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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