2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)最新文献_第2页

An Automatic Gain Control Amplifier with Linear-in-dB Gain in 22nm CMOS 22nm CMOS线性db增益自动增益控制放大器

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660341

Hongwei Guo, Zhiqun Li, Aiyuan Miao, Xiaowei Wang, Zhennan Li

引用次数: 0

DMA Function Verification Based on UVM Verification Platform 基于UVM验证平台的DMA功能验证

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660239

Jie Wang, Shuqin Geng, Xiaohong Peng, Xuefeng Li, Qian Sun, Pengkun Li

引用次数: 1

A 22nm CMOS 2.4-5.25GHz Mixer Resilient to Out-of-Band Blockers 一种22nm CMOS 2.4-5.25GHz抗带外阻滞器的混频器

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660241

Yuan Liang, Zhiqun Li, Dongdong Chen, Xiaowei Wang, Zhennan Li

引用次数: 0

A Feedback-Controlled Technique with High Impedance and High Linearity for Neural Signal Applications 一种用于神经信号应用的高阻抗高线性反馈控制技术

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660288

Chi Zhang, Longbin Zhu, Rui Yang, Zhijun Zhou, Qiao Meng, Zhigong Wang

引用次数: 0

A Power Management Unit for Battery-Less TEG Energy Harvesting With Low Voltage Self-Startup 一种低电压自启动无电池TEG能量采集的电源管理单元

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660277

Peng Cui, Baolin Wei, Zhanrong Liang, Xueming Wei, Weilin Xu

引用次数: 1

Enhanced Heat Dissipation of GaN RF Devices Based on Double-diamond Structure 基于双金刚石结构的GaN射频器件的增强散热性能

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660259

Fen Guo, Tuo Li, Hongtao Man, Kai Liu, Xiaoliang Wang

{"title":"Enhanced Heat Dissipation of GaN RF Devices Based on Double-diamond Structure","authors":"Fen Guo, Tuo Li, Hongtao Man, Kai Liu, Xiaoliang Wang","doi":"10.1109/ICICM54364.2021.9660259","DOIUrl":"https://doi.org/10.1109/ICICM54364.2021.9660259","url":null,"abstract":"In this paper, an enhanced heat dissipation structure, combining diamond substrate and diamond spreader, is considered for further improving the heat dissipation efficiency of GaNRF devices. The steady-state simulation is performed to analyze the thermal management ability of heat dissipation structures. The simulation is mainly focused on the comparisons of heat transfer capability and characteristics for double-diamond heat dissipation structure and the others, including GaN on SiC, GaN on diamond and GaN on SiC with diamond spreader. Simulation demonstrates that the junction temperature of device with double-diamond structure is 120°C, significantly lower than that on SiC substrate, since the coordination of diamond substrate and diamond spreader strengthens heat dissipation in both directions. The results also show that the heat dissipation performance of device is improved about 15 % by adding only 10 $mu$m diamond spreader in double-diamond structure compared to that of single diamond substrate. In addition, the heat transfer ability could be further enhanced by optimizing the spreader thickness and the interface thermal resistance.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"2 1","pages":"55-60"},"PeriodicalIF":0.0,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88577253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Design of a 128×128 Cryogenic Readout Circuit for Silicon-based Blocked-impurity-band Detector 硅基阻塞杂质带检测器128×128低温读出电路的设计

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660223

Ying Li, Hong Ma, Xin Ge, Xiaowan Dai, Yongshan Hu, Yulu Chen, Xiaodong Wang

引用次数: 0

Electro-thermal Investigation on SOI Accumulation Mode Tri-gate LDMOS SOI积累模式三栅极LDMOS的电热特性研究

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660247

Zhangjun Shi, Xiaojin Li, Yabin Sun, Yanling Shi

引用次数: 0

A High-Resolution Two-Step Time-to-Digital Conversion in 40 nm CMOS 40纳米CMOS的高分辨率两步时间-数字转换

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660337

Xiao Yun Chen, Lu Tang, Xuan Shen

引用次数: 0

A Progressive Automatic Logic Synthesis Method for Timing-Limited SoC Design 限时SoC设计的渐进自动逻辑综合方法

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2021-10-22 DOI: 10.1109/ICICM54364.2021.9660258

Rengang Li, Tuo Li, Kai Liu, Hongtao Man, Xiaofeng Zou, Changhong Wang

{"title":"A Progressive Automatic Logic Synthesis Method for Timing-Limited SoC Design","authors":"Rengang Li, Tuo Li, Kai Liu, Hongtao Man, Xiaofeng Zou, Changhong Wang","doi":"10.1109/ICICM54364.2021.9660258","DOIUrl":"https://doi.org/10.1109/ICICM54364.2021.9660258","url":null,"abstract":"With the continuous progress of semiconductor technology, integrated circuits (ICs) have been applied to various electronic devices, such as computers, mobile phones, industrial controllers and so on. System on chip (SoC) is a special IC chip with system architecture, generally including computing logic, acceleration logic, and peripheral units. It has the advantages of small size, low power consumption, and high flexibility, and has been widely used. In the SoC chip design process, logical timing is usually very tight, which will lead to great difficulties in the logic synthesis stage. In general, the conventional synthesis method will manually increase the proportion of path groups, low voltage threshold (LVT) cells, ultra-low voltage threshold (ULVT) cells to improve timing performance, but its timing closure is slow, which will prolong the whole SoC chip design cycle. In order to improve the convergence speed of the SoC chip logic synthesis, this paper proposes a progressive automatic logic synthesis (PALS) method, which adopts progressive form to add path groups, insert LVT and ULVT cells, and performs iteration automatically. In this method, the iterative optimization constraints have the advantages of gradual progression and comprehensive coverage, which improves the convergence speed of logic synthesis effectively. In addition, ARM CortexA7 is synthesized using PALS method, and the experimental results show that the timing convergence time of the PALS method proposed in this paper is reduced by 12% compared with the conventional method, proving the superiority of the PALS method.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"11 1","pages":"227-231"},"PeriodicalIF":0.0,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90323454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0