1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)最新文献_第2页

Modeling and simulation of the interference due to digital switching in mixed-signal ICs 混合信号集成电路中数字开关干扰的建模与仿真

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810624

A. Demir, P. Feldmann

引用次数: 18

Cell replication and redundancy elimination during placement for cycle time optimization 细胞复制和冗余消除在放置周期时间优化

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810614

I. Neumann, D. Stoffel, H. Hartje, W. Kunz

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引用次数: 16

A framework for testing core-based systems-on-a-chip 用于测试基于内核的片上系统的框架

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810680

S. Ravi, G. Lakshminarayana, N. Jha

{"title":"A framework for testing core-based systems-on-a-chip","authors":"S. Ravi, G. Lakshminarayana, N. Jha","doi":"10.1109/ICCAD.1999.810680","DOIUrl":"https://doi.org/10.1109/ICCAD.1999.810680","url":null,"abstract":"Available techniques for testing core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesising low-overhead test architectures and compact test solutions. In this paper, we provide a comprehensive framework that generates low-overhead compact test solutions for SOCs. First, we develop a common ground for addressing issues such as core test requirements, core access and test hardware additions. For this purpose, we introduce finite-state automata for modeling tests, transparency modes and test hardware behavior. In many cases, the tests repeat a basic set of test actions for different test data which can again be modeled using finite-state automata. While earlier work can derive a single symbolic test for a module in a register-transfer level (RTL) circuit as a finite-state automaton, this work extends the methodology to the system level, and, additionally contributes a satisfiability-based solution to the problem of applying a sequence of tests phased in time. This problem is known to be a bottleneck in testability analysis not only at the system level, but also at the RTL. Experimental results show that the system-level average area overhead for making SOCs testable with our method is only 4.4%, while achieving an average test application time reduction of 78.5% over recent approaches. At the same time, it provides 100% test coverage of the precomputed test sets/sequences of the embedded cores.","PeriodicalId":6414,"journal":{"name":"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)","volume":"61 1","pages":"385-390"},"PeriodicalIF":0.0,"publicationDate":"1999-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81027151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Model reduction for DC solution of large nonlinear circuits 大型非线性电路直流解的模型简化

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810678

E. Gad, M. Nakhla

引用次数: 8

Probabilistic state space search 概率状态空间搜索

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810713

A. Kuehlmann, K. McMillan, R. Brayton

引用次数: 37

Throughput optimization of general non-linear computations 一般非线性计算的吞吐量优化

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810684

Inki Hong, M. Potkonjak, L. Guerra

引用次数: 2

Transient sensitivity computation for transistor level analysis and tuning 晶体管电平分析和调谐的瞬态灵敏度计算

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810634

Tuyen V. Nguyen, P. O'Brien, David W. Winston

引用次数: 3

A methodology for correct-by-construction latency insensitive design 一种按结构校正延迟不敏感设计方法

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1007/978-1-4615-0292-0_12

L. Carloni, K. McMillan, A. Saldanha, A. Sangiovanni-Vincentelli

引用次数: 176

Bit-level arithmetic optimization for carry-save additions 进位保存加法的位级算法优化

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810611

Kei-Yong Khoo, Zhan Yu, A. Willson

引用次数: 8

Interconnect parasitic extraction in the digital IC design methodology 数字集成电路设计方法中的互连寄生提取

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI: 10.1109/ICCAD.1999.810653

M. Kamon, S. McCormick, K. Sheperd

引用次数: 15