高性能计算技术最新文献_第7页

Session details: 1 会话详情:1

高性能计算技术 Pub Date : 2011-11-13 DOI: 10.1145/3256283

A. Herdman

引用次数: 0

Session details: 4 会话详情:4

高性能计算技术 Pub Date : 2011-11-13 DOI: 10.1145/3256286

Todd Gamblin

引用次数: 0

Session details: 3 会话详情:3

高性能计算技术 Pub Date : 2011-11-13 DOI: 10.1145/3256285

I. Miller

引用次数: 0

Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring 研究具有最小侵入性系统监控的弹性高性能可重构计算

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670795

Bin Huang, A. Schmidt, Ashwin A. Mendon, R. Sass

引用次数: 9

A parallel hardware architecture for information-theoretic adaptive filtering 一种用于信息理论自适应滤波的并行硬件结构

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670798

S. Craciun, A. George, H. Lam, J. Príncipe

{"title":"A parallel hardware architecture for information-theoretic adaptive filtering","authors":"S. Craciun, A. George, H. Lam, J. Príncipe","doi":"10.1109/HPRCTA.2010.5670798","DOIUrl":"https://doi.org/10.1109/HPRCTA.2010.5670798","url":null,"abstract":"Information-theoretic cost functions such as minimization of the error entropy (MEE) can extract more structure from the error signal, yielding better results in many realistic problems. However, adaptive filters (AFs) using MEE methods are more computationally intensive when compared to conventional, mean-squared error (MSE) methods employed in the well-known, least mean squares (LMS) algorithm. This paper presents a novel, parallel hardware architecture for MEE adaptive filtering. The design has been implemented and evaluated in realtime on one of the servers of the Novo-G machine in the NSF CHREC Center at the University of Florida, believed to be the most powerful reconfigurable supercomputer in academia. By pipelining the design and parallelizing independent computations within the algorithm, our proposed hardware architecture successfully achieves a speedup of 5800 on one FPGA, 23200 on one quad-FPGA board, and 46400 on two quad-FPGA boards, as compared to the same algorithm running in software (optimized C program) on a single CPU core. Just as important, our results show that this reconfigurable design does not lose precision while converging to the optimum solution in the same number of steps as the software version. As a result, our approach makes it possible for AFs using the MEE cost function to adapt in real-time for signals that require a sampling rate in excess of 400 kHz and thus can target a much wider range of applications.","PeriodicalId":59014,"journal":{"name":"高性能计算技术","volume":"15 1","pages":"1-10"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87510297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Towards production FPGA-accelerated molecular dynamics: Progress and challenges 迈向生产fpga加速分子动力学:进展与挑战

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670800

Matt Chiu, M. Herbordt

{"title":"Towards production FPGA-accelerated molecular dynamics: Progress and challenges","authors":"Matt Chiu, M. Herbordt","doi":"10.1109/HPRCTA.2010.5670800","DOIUrl":"https://doi.org/10.1109/HPRCTA.2010.5670800","url":null,"abstract":"Recent work in the FPGA acceleration of molecular dynamics simulation has shown that including on-the-fly neighbor list calculation (particle filtering) in the device has the potential for an 80× per core speed-up over the CPU-based reference code and so to make the approach competitive with other computing technologies. In this paper we report on progress and challenges in advancing this work towards the creation of a production system, especially one capable of running on a large-scale system such as the Novo-G. The current version consists of an FPGA-accelerated NAMD-lite running on a PC with a Gidel PROCStar III. The most important implementation issues include software integration, handling exclusion, and modifying the force pipeline. In the last of these we have added support for Particle-Mesh-Ewald and augmented the Lennard-Jones calculation with a switching function. In experiments, we find that energy stability so far appears to be acceptable, but that longer simulations are needed. Due primarily to the added complexity of the force pipelines, performance is somewhat diminished from the previous study; we find, however, that porting to a newer (existing) device will more than compensate for this loss.","PeriodicalId":59014,"journal":{"name":"高性能计算技术","volume":"13 1","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84957481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Optimization and performance study of large-scale biological networks for reconfigurable computing 面向可重构计算的大规模生物网络优化与性能研究

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670796

M. Bhuiyan, Ananth Nallamuthu, M. C. Smith, V. Pallipuram

引用次数: 15

Comparative analysis of HPC and accelerator devices: Computation, memory, I/O, and power HPC和加速器设备的比较分析:计算、内存、I/O和功率

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670797

J. Richardson, Steven Fingulin, Diwakar Raghunathan, Chris Massie, A. George, H. Lam

引用次数: 21

An application of high-performance reconfigurable computing in radio astronomy signal processing 高性能可重构计算在射电天文信号处理中的应用

高性能计算技术 Pub Date : 2010-12-17 DOI: 10.1109/HPRCTA.2010.5670794

J. Ford, J. Ray