Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering最新文献_第7页

Impedance-Based Modeling and Stability Analysis of the Input-Series Output-Parallel DAB3 Converter with Decentralized Control 分散控制下的输入-串联-输出-并联DAB3变换器阻抗建模及稳定性分析

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10220987

Amandus Bach, Jan Mathé, Benedict J. Mortimer, Tim Karsten, R. D. Doncker

{"title":"Impedance-Based Modeling and Stability Analysis of the Input-Series Output-Parallel DAB3 Converter with Decentralized Control","authors":"Amandus Bach, Jan Mathé, Benedict J. Mortimer, Tim Karsten, R. D. Doncker","doi":"10.1109/COMPEL52896.2023.10220987","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10220987","url":null,"abstract":"Input-series output-parallel (ISOP) dc-dc converter systems require a dedicated input-voltage-sharing (IVS) control strategy. A centralized IVS control typically reduces system modularity and reliability. Thus, this paper adopts a decentralized IVS control method to the ISOP-connected three-phase dual-active bridge (DAB3) converter. It contributes to exploring decentralized control methods for ISOP systems by linking the theory of the negative incremental-resistance behavior to the instability of the IVS-transfer function. For the stability assessment, closed-loop input impedance models of the DAB3 converter are derived that include the effects of the control and the output-parallel connection into a single-input single-output (SISO) model. The derived analytical models are verified via multitone analyses of a switching model in offline simulations. This way, the stability of the whole ISOP system can be predicted solely based on the SISO model. The model-based stability regions are validated on a real-time simulation system of a two-module system at a switching frequency of 10 kHz. Experimental results are presented for an eight-module system with an input voltage of 5 kV.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"251 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73104043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Interleaving Boost Extender Topology 交错升压扩展器拓扑

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221007

Vikas Kumar Rathore, M. Evzelman, M. Peretz

引用次数: 0

Scalable High-Power Battery Emulator for Power Hardware-in-the-Loop Applications 用于电源硬件在环应用的可扩展大功率电池仿真器

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221018

Bar Halivni, Daniel Beniaminson, Lee Maman, Adi Yankovich, M. Evzelman, M. Peretz

{"title":"Scalable High-Power Battery Emulator for Power Hardware-in-the-Loop Applications","authors":"Bar Halivni, Daniel Beniaminson, Lee Maman, Adi Yankovich, M. Evzelman, M. Peretz","doi":"10.1109/COMPEL52896.2023.10221018","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221018","url":null,"abstract":"This paper introduces a scalable power hardware-in-the-loop (PHiL) battery emulation system. The battery emulator enables the simulation of real battery voltage profiles with full power rating sink and sourcing capabilities using off-the-shelf components. The battery emulator tracks battery voltage, temperature, and current to provide real-time monitoring of the emulated battery’s state of charge (SOC) and remaining useful life (RUL). The emulator operates in a continuous battery emulation mode or a cyclic mode for repetitive battery testing. The new battery emulator can replace end-product batteries during system development and is realized in two parts, PC Graphical User Interface (GUI) and battery emulator (Hardware). A battery profile-generating algorithm is introduced to accurately reflect the behavior of an actual battery during emulation. All measured data and battery voltage profiles are transferred via Wi-Fi to enable maximal freedom in system deployment. An experimental prototype has been built and tested to verify the battery emulation operation. The prototype handles a maximum input voltage of 150V and an input current of 60A.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"2 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78769657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Comparative Evaluation of DC-link Capacitor RMS Current Stress for Conventional and Reduced Common Mode Voltage SVPWM based Inverters 基于常规和降低共模电压的SVPWM逆变器直流链路电容RMS电流应力的比较评估

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221179

A. A. Khan, N. Zaffar, M. Ikram

{"title":"Comparative Evaluation of DC-link Capacitor RMS Current Stress for Conventional and Reduced Common Mode Voltage SVPWM based Inverters","authors":"A. A. Khan, N. Zaffar, M. Ikram","doi":"10.1109/COMPEL52896.2023.10221179","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221179","url":null,"abstract":"This work investigates the comparative assessment of DC-link current ripples in perspective of reduced common mode voltage (RCMV) PWM schemes. The anticipated simultaneous reduction of ripple current on DC-link capacitor and common mode voltage compared to traditional PWM approach is seen to exist in certain regions of operation. This may result in reduced thermal stress and consequently in enhanced reliability and operational lifetime. Another increasingly important consideration is for DC microgrids where the inverters are connected directly to the dc-bus and ripple reduction and RCMV for one or more of these inverters is critical for reliable operation. This work utilizes the piece-wise sinusoidal form of DC-link current computing a closed form RMS current expression that is further analyzed for varying load and mod-indices. The RMS DC-link current of conventional space vector PWM has also been analyzed as base case. It would be seen that these modified PWMs mostly put higher ripple stresses on capacitor. However, there are specific regions where one PWM scheme can be employed for reducing DC-link stress.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"71 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88150341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

The ΔV-Method: An Intuitive Method for Analyzing Soft-Charging Capabilities of Hybrid Switched-Capacitor DC-DC Converters ΔV-Method:一种直观的分析混合开关电容DC-DC变换器软充电能力的方法

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221027

Markus Mogensen Henriksen, Jens Otten, Adrian Gehl, B. Wicht

引用次数: 0

High-Performance Synchronous Resistance Compression Network-based Resonant DC-DC Converter Utilizing Matching Network 基于匹配网络的高性能同步电阻压缩网络谐振DC-DC变换器

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221146

Firehiwot Gurara, K. Afridi

引用次数: 0

Active Fault Current Limiting Control for Half-bridge MMC in HVDC Systems 高压直流半桥MMC有源故障限流控制

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221028

Pengxiang Huang, Shahil Shah, L. Vanfretti

引用次数: 0

Closed-Loop Adaptive Frequency and Phase-Shift Control of Bidirectional Class-E² Converter for Energy Storage Applications 用于储能的e²类双向变换器的闭环自适应频移相控制

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221002

Kamlesh Sawant, Jungwon Choi

{"title":"Closed-Loop Adaptive Frequency and Phase-Shift Control of Bidirectional Class-E² Converter for Energy Storage Applications","authors":"Kamlesh Sawant, Jungwon Choi","doi":"10.1109/COMPEL52896.2023.10221002","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221002","url":null,"abstract":"This paper presents discrete frequency and phase-shift control for a bidirectional class-E2 converter, enabling a wide range of output power in energy storage applications. Class-E² converters typically operate within a narrow power range to achieve zero voltage switching (ZVS) across the switching devices and ensure high efficiency. To address this limitation, we propose an adaptive frequency control algorithm that utilizes multiple frequency steps to reduce output ripple and minimize output capacitor requirements. Our adaptive frequency control algorithm ensures high efficiency across a wide output power range by using 16 discrete switching frequency steps ranging from 800 kHz to 1.6 MHz. Duty ratios are pre-computed and stored in a lookup table to provide ZVS at each frequency. We also apply a variable phase shift between the switching devices to maintain ZVS and control the power flow direction. By directly selecting and applying the appropriate frequency from the lookup table instead of sequential searching, our proposed algorithm enables faster dynamic response with minimal undershoot and overshoot. Through simulation and implementation of closed-loop control of the bidirectional class-E2 converter prototype using an MCU, we achieved bidirectional output power level variation from 13 W to 350 W with a maximum efficiency of 93.5%.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"2 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89660836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters buck型交直流并网飞容多电平变换器的功率因数校正与有源电压平衡联合控制技术

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221009

Roderick S. Bayliss, Nathan C. Brooks, R. Pilawa-Podgurski

{"title":"A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters","authors":"Roderick S. Bayliss, Nathan C. Brooks, R. Pilawa-Podgurski","doi":"10.1109/COMPEL52896.2023.10221009","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221009","url":null,"abstract":"Single-stage Power Factor Correction (PFC) ac-dc rectifiers open a pathway to achieve high power density and efficiency in grid-connected rectifier applications where the target dc voltage is lower than the peak ac voltage (e.g. data center power delivery, LED drivers). Typically in data center and similar applications, a two-stage solution employing a step-up ac-dc stage followed by a step-down dc-dc stage is employed to achieve grid to 48 V conversion. This approach suffers from the efficiency penalty of a cascade of power converters and typically lower power density due to the design of two separate power conversion stages. A single-stage, buck-type PFC rectifier where the output dc voltage is lower than the peak ac voltage circumvents these issues. This work analyzes and develops a single-stage buck-type PFC rectifier utilizing a six-level flying capacitor multilevel (FCML) converter with active flying capacitor voltage balancing and current control to achieve high power density rectification in a single-stage solution. This work is the first to achieve active balancing of capacitors combined with PFC operation in a step-down FCML rectifier.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"36 1","pages":"1-5"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85860886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Flying Capacitor Four-Level Supply Modulator with Active Balancing for RF Power Amplifier Applications 射频功率放大器用主动平衡飞电容四电平电源调制器

IF 0.7 4区工程技术

Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI: 10.1109/COMPEL52896.2023.10221075

Audrey Cheshire, Aarranon Bharathan, D. Maksimović

{"title":"Flying Capacitor Four-Level Supply Modulator with Active Balancing for RF Power Amplifier Applications","authors":"Audrey Cheshire, Aarranon Bharathan, D. Maksimović","doi":"10.1109/COMPEL52896.2023.10221075","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221075","url":null,"abstract":"This paper presents a four-level flying capacitor multi-level (FCML) converter operating as a drain supply modulator (DSM) for radio frequency power amplifiers (RFPAs). The proposed FCML-based DSM excludes the standard output LC filter and employs a direct multi-level DSM approach, changing the output according to an external RFPA drain-supply level demand. A simple state-machine-based controller ensures that the flying capacitor voltages remain balanced for arbitrary sequences of requested output voltage levels. The functionality of the state-machine controlled converter is verified with a GaN-based DSM prototype with output voltage levels of 0V, 6.67V, 13.33 V, and 20 V generated from an input dc voltage of 20 V, and with the state-machine controller sampling period of 5$mu$s. Experimental results show the converter is able to maintain capacitor charge balance across the flying capacitors while outputting the requested RFPA level demand. The maximum output current of the converter is 0.8 A, while efficiencies measured at each output level range between 99.0-99.8%.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"3 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82511372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0