Semiconductor Science and Technology最新文献_第4页

Effect of traps on carrier transport in CdSe quantum dot thin films 阱对碲化镉量子点薄膜中载流子传输的影响

Semiconductor Science and Technology Pub Date : 2024-04-17 DOI: 10.1088/1361-6641/ad3fe2

F. Zheng, Zhonghao Li, Bo Huang, Hongbing Zhu, Ying Wu

{"title":"Effect of traps on carrier transport in CdSe quantum dot thin films","authors":"F. Zheng, Zhonghao Li, Bo Huang, Hongbing Zhu, Ying Wu","doi":"10.1088/1361-6641/ad3fe2","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3fe2","url":null,"abstract":"\u0000 The influence of trap effects on carrier transport characteristics in quantum dot (QD) thin films is the subject of study, aiming to provide a theoretical basis for the structural design and performance improvement of QD thin film optoelectronic devices. This study presents a specific mathematical description of capturing and releasing charges by traps, which includes the time-varying equation for captured charges. Utilizing the carrier hopping transport model, a system of partial differential equations is employed as the physical field, establishing hopping transport models that account for both shallow traps and a combination of shallow and deep traps. Simulations based on specific experimental samples reveal that the presence of traps introduces asymmetry in the diffusion motion of charge carriers, extending the duration of the photocurrent signal and resulting in the capture of charges, along with a reduction in the peak value of the current signal. The model also simulates carrier transport characteristics under the influence of repetitive light pulses, demonstrating distinct patterns in capturing and releasing charges for both shallow and deep traps.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":" 13","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140691416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Laser ablation of thin SiNx layer coated on silicon wafer - evaluation of process performance for PERC solar cell application 激光烧蚀硅晶片上的氮化硅薄层--评估 PERC 太阳能电池应用的工艺性能

Semiconductor Science and Technology Pub Date : 2024-04-16 DOI: 10.1088/1361-6641/ad3f3f

Pinal Rana, D. P. Khatri, Anil Kottantharayil, Deepak Marla

{"title":"Laser ablation of thin SiNx layer coated on silicon wafer - evaluation of process performance for PERC solar cell application","authors":"Pinal Rana, D. P. Khatri, Anil Kottantharayil, Deepak Marla","doi":"10.1088/1361-6641/ad3f3f","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3f3f","url":null,"abstract":"\u0000 In fabricating passivated emitter and rear contact (PERC) solar cells, creating small openings on the SiNx-coated silicon substrate to establish metal contacts necessitates using a nanosecond pulsed green laser for ablation. However, the thermal nature of laser ablation poses a challenge. Excessive nitrogen diffusion from SiNx into the silicon substrate can compromise the electrical performance of solar cells. Therefore, this study aims to comprehensively understand how laser parameters impact the electrical properties of such solar cells. PERC solar cell precursors were initially crafted by ablating the SiNx layer at four laser fluences, each corresponding to different regimes: solid, liquid, vapor, and phase explosion. Subsequently, various optical, chemical, and electrical characterizations were conducted on the solar cell precursors. Complete PERC solar cells were also fabricated to measure quantum efficiency (QE). In the solid regime, SiNx removal is precise, with minimal thermal damage, resulting in a nitrogen concentration of approximately 0.15%. Photoluminescence count and carrier lifetime are notably higher by 21% in the solid regime compared to the explosive regime. The QE measurement at 984 nm quantitatively assesses rear-side recombination losses. Notably, 26% of the area exhibits a 56% QE in the solid state, while this figure drops to around 22% in the explosive state. This decline can be attributed to increased thermal damage in the explosive regime, which augments recombination centers and diminishes the solar cell performance. PERC solar cells ablated in the solid regime showcase lower subsurface damage, superior electrical characteristics, and higher performance than those ablated in the explosive regime.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":"4 16","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140696826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Investigation of Ohmic contact to plasma-etched n-Al0.5Ga0.5N by surface treatment 通过表面处理研究等离子体蚀刻 n-Al0.5Ga0.5N 的欧姆触点

Semiconductor Science and Technology Pub Date : 2024-04-12 DOI: 10.1088/1361-6641/ad3e26

Shenhui Zhou, Yu Ding, Zhe Zhuang, Yimeng Sang, Kai Chen, Feifan Xu, Junchi Yu, Tao Tao, Ting Zhi, Hai Lu, Rong Zhang, Bin Liu

引用次数: 0

Tailored efficient and reliable double luminescent layer hybrid WOLEDs via doping engineering 通过掺杂工程定制高效可靠的双发光层混合 WOLED

Semiconductor Science and Technology Pub Date : 2024-04-12 DOI: 10.1088/1361-6641/ad3e23

Wenxin Zhang, Gang Zhang, Xi Chang, He Dong, Jihui Lang, Guoliang Xing, Dandan Wang, Zhihong Mai, ying xin Wang

{"title":"Tailored efficient and reliable double luminescent layer hybrid WOLEDs via doping engineering","authors":"Wenxin Zhang, Gang Zhang, Xi Chang, He Dong, Jihui Lang, Guoliang Xing, Dandan Wang, Zhihong Mai, ying xin Wang","doi":"10.1088/1361-6641/ad3e23","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3e23","url":null,"abstract":"\u0000 Doping engineering has been widely utilized to increase the efficiency of WOLEDs. In this study, a blue phosphor material named DMAC-DPS and an orange phosphor material named PO-01 are integrated into the host materials DPEPO and CBP by incorporating the principle of complementary color luminescence, resulting in a doped double-luminescent layer hybrid WOLED. The developed device structure consists of ITO/MoO3/TCTA/DPEPO:DMAC-DPS/CBP:PO-01 (or CBP:PO-01/DPEPO:DMAC-DPS)/ TAZ/Alq3/LiF/Al. The transfer of energy between the host and guest materials is achieved by controlling the thickness and position of the emitting layer, leading to a more balanced emission of blue and yellow light and an overall increase in device efficiency. The developed WOLED exhibits a maximum current efficiency of 26.8 cd/A, a power efficiency of 16.8 lm/W, and an external quantum efficiency of 10.95%. The stable color coordinates of the device remains consistent, varying from (0.34, 0.40) to (0.33, 0.39) at brightness levels ranging from 100 to 1000 cd/m2. Technically, the incorporation of blue and orange phosphor materials into the host materials DPEPO and CBP, respectively, resulting in a doped double-luminescent layer hybrid WOLED, has shown a more balanced emission of blue and yellow light and resulted in increased efficiency. The reliable color coordinates corroborate the good color stability, making it a promising candidate for various applications. Furthermore, the controlled transfer of energy between the host and guest materials has led to a more balanced emission of blue and yellow light. Our developed doping engineering methods have shown potential for increased efficiency and good color stability, making the developed WOLED a promising candidate for various applications.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":"85 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140711228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Comprehensive study on catalytic potential of Ti3C2Tx based catalyzer for Dye sensitized solar cells application 基于 Ti3C2Tx 催化剂的染料敏化太阳能电池催化潜力综合研究

Semiconductor Science and Technology Pub Date : 2024-04-12 DOI: 10.1088/1361-6641/ad3e25

G. N. Arka, S. B. Prasad, Subhash Singh

{"title":"Comprehensive study on catalytic potential of Ti3C2Tx based catalyzer for Dye sensitized solar cells application","authors":"G. N. Arka, S. B. Prasad, Subhash Singh","doi":"10.1088/1361-6641/ad3e25","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3e25","url":null,"abstract":"\u0000 Recently Dye-sensitized solar cells (DSSC) have gained significant research limelight for having exceptional photovoltaic potential. However, DSSC became an underdog solar cell due to the use of an expensive transparent conductive layer (FTO/ITO) along with the use of rare earth element Pt to concoct counter electrode (CE). Thus, an attempt has been made to concoct a Ti3C2-TX MXene-based CE to replace both the transparent conductive layer and CE. Herein, relatively larger with less defective Ti3C2 flakes were produced by the minimally intensive layer delamination method, and physical architecture was investigated by X-ray diffraction (XRD) mapping, Field-emission scanning electron microscope (FE-SEM) and Dynamic light scattering (DLS), respectively. MXene flakes were drop cast on a glass substrate by dispersing it in ethanol, isopropyl alcohol, and deionized water, respectively, and found the least sheet resistance, 14.824 Ω/sq by 4-point probe test, owing to superior adsorption force with the glass substrate. Ethanol solvent facilitates optimum interlamellar spacing to promote fast diffusion and transportation. Further, the study was expanded by introducing it to numerous sintering temperatures to find the best result. The result revealed exceptional sheet resistance of 0.08 Ω/sq for the 120℃ sintered sample, which was encouraged by removing water intercalant and occupying H+. Further, the potential of MXene-based counter electrode’s catalytic activity has been studied through electrochemical impedance spectroscopy, Tafel polarization, and Cyclic voltammogram under iodide and triiodide-based electrolytes. The electrochemical study revealed 120℃ sintered sample superior to 140℃ sintered but comparable to Pt CE. 120℃ sintered Ti3C2-based CE performed exceptional 6.27% power conversion efficiency. Thus, this novel study communicates that Ti3C2-TX is a potential replacement for transparent conductive oxide layer and Pt, frequently used in Dye-sensitized solar cell applications.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":"9 14","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140709957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low-temperature preparation and characteristics of top-gate thin film transistors with La-ZTO active layers and polymethylmethacrylate dielectric layers 具有 La-ZTO 活性层和聚甲基丙烯酸甲酯介电层的顶栅薄膜晶体管的低温制备及其特性

Semiconductor Science and Technology Pub Date : 2024-04-12 DOI: 10.1088/1361-6641/ad3e24

L. Yue, Fanxin Meng, Min Su

引用次数: 0

Study on multifunctional resistive switching and UV light detection characteristics in p-PEDOT:PSS/i-BFO/n-ZnO hybrid structures p-PEDOT:PSS/i-BFO/n-ZnO 杂化结构中的多功能电阻开关和紫外光检测特性研究

Semiconductor Science and Technology Pub Date : 2024-04-11 DOI: 10.1088/1361-6641/ad3d7d

Asif Rasool, S. Kossar, R. Amiruddin

{"title":"Study on multifunctional resistive switching and UV light detection characteristics in p-PEDOT:PSS/i-BFO/n-ZnO hybrid structures","authors":"Asif Rasool, S. Kossar, R. Amiruddin","doi":"10.1088/1361-6641/ad3d7d","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3d7d","url":null,"abstract":"\u0000 The present research work based on the newly prepared organic-inorganic hybrid heterostructure will be exploited to develop a multifunctional device including non-volatile resistance switching (RS) memory devices, and ultraviolet (UV) light detection behavior for the first time based on p-PEDOT:PSS/i-BFO/n-ZnO junctions. Using a spray pyrolysis technique, n-type zinc oxide (ZnO) and i-type bismuth ferrite (BiFeO3) thin film layers were prepared on the clean glass substrates at temperature 673K. Using a spin coater method, the p-PEDOT:PSS were grown upon a bismuth ferrite (BiFeO3) thin film with a constant spin velocity of 2000 rpm and heated at 363 K. The current (I)-voltage (V), resistive switching behavior and photoresponse characteristics of the fabricated p-PEDOT:PSS/i-BFO/n-ZnO hybrid devices were carried out. The device shows high photoresponsivity (R) of 0.001285 A/W and fast photoresponse switching speed with the measured rise and fall time of 493 and 970 ms respectively. Based on the electrical properties, a conductive filament formation/rupture mechanism is proposed to explain the observed resistive switching characteristics.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":"19 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140715260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Study of optical float-zone grown gallium oxide schottky barrier diode 光学浮区生长氧化镓肖特基势垒二极管的研究

Semiconductor Science and Technology Pub Date : 2024-04-10 DOI: 10.1088/1361-6641/ad3d03

J. Sahoo, P. Vijayakumar, T. Saquib, Suganya M., G. S., Rangrajan Muralidharan, Digbijoy Nath

引用次数: 0

Realizing ultra-scaled novel Ga2O3 FinFET for sub-tera hertz applications 为亚太赫兹应用实现超大规模新型 Ga2O3 FinFET

Semiconductor Science and Technology Pub Date : 2024-04-10 DOI: 10.1088/1361-6641/ad3d05

Priyanshi Goyal, H. Kaur

引用次数: 0

Understanding the trap-induced frequency dispersion in the C-V curve of AlGaN/GaN Hetero-Structure 理解 AlGaN/GaN 异质结构 C-V 曲线中陷阱诱导的频率色散

Semiconductor Science and Technology Pub Date : 2024-04-10 DOI: 10.1088/1361-6641/ad3d04

Priyanka Nautiyal, Peyush Pande, Virender Kundu, Vikas Joshi, Mayank Chaturvedi

{"title":"Understanding the trap-induced frequency dispersion in the C-V curve of AlGaN/GaN Hetero-Structure","authors":"Priyanka Nautiyal, Peyush Pande, Virender Kundu, Vikas Joshi, Mayank Chaturvedi","doi":"10.1088/1361-6641/ad3d04","DOIUrl":"https://doi.org/10.1088/1361-6641/ad3d04","url":null,"abstract":"\u0000 This article investigates the trapping mechanism in AlGaN/GaN heterostructure. For our study, the traps within the AlGaN layer are introduced at the interface and near the interface of AlGaN/GaN, in the SILVACO TCAD tool. Frequency-dependent Capacitance-Voltage (CVF) curves are obtained to study the impact of traps on device performance. From the CVF curve, it is found that the existence of interface traps introduces a shift in capacitance along the gate voltage axis. These traps introduce the threshold voltage (V_TH) shift. Furthermore, a detailed study of near-interface traps (NITs) is done based on tunneling mechanisms. For our investigation, the NITs are positioned at 0.5 nm, 1 nm, and 1.5 nm away from the AlGaN/GaN interface. The response of the NITs reduces the capacitance value in the accumulation region. The response of the NITs is explained through the capacitance charge model and border trap model. For NITs placed 0.5 nm away from the interface, the frequency dispersion in the accumulation region becomes evident. On the contrary, the dispersion reduces significantly, as the NITs goes deeper upto 1.5 nm. The results indicate that the NITs nearer to the interface respond to high frequencies. Further, the temperature dependent Capacitance-Voltage (CVT) analysis is done for both interface and near-interface traps (NITs), to understand the effect of temperature on frequency dispersion.","PeriodicalId":507064,"journal":{"name":"Semiconductor Science and Technology","volume":"375 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140719535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0