IEICE Transactions on Electronics最新文献

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Fine feature analysis of metal plate based on two-dimensional imaging under non-ideal scattering 基于非理想散射二维成像的金属板精细特征分析
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022ecp5054
Xiaofang Li, B. Deng, Qiang Fu, Hongqiang Wang
{"title":"Fine feature analysis of metal plate based on two-dimensional imaging under non-ideal scattering","authors":"Xiaofang Li, B. Deng, Qiang Fu, Hongqiang Wang","doi":"10.1587/transele.2022ecp5054","DOIUrl":"https://doi.org/10.1587/transele.2022ecp5054","url":null,"abstract":"SUMMARY The ideal point scattering model requires that each scattering center is isotropic, the position of the scattering center corresponding to the target remains unchanged, and the backscattering amplitude and phase of the target do not change with the incident frequency and incident azimuth. In fact, these conditions of the ideal point scattering model are difficult to meet, and the scattering models are not ideal in most cases. In order to understand the difference between non-ideal scattering center and ideal scattering center, this paper takes a metal plate as the research object, carries out two-dimensional imaging of the metal plate, compares the difference between the imaging position and the theoretical target position, and compares the shape of the scattering center obtained from two-dimensional imaging of the plate from different angles. From the experimental results, the offset between the scattering center position and the theoretical target position corresponding to the two-dimensional imaging of the plate under the non-ideal point scattering model is less than the range resolution and azimuth resolution. The deviation between the small angle two-dimensional imaging position and the theoretical target position using the ideal point scattering model is small, and the ideal point scattering model is still suitable for the two-dimensional imaging of the plate. In the imaging process, the ratio of range resolution and azimuth resolution affects the shape of the scattering center. The range resolution is equal to the azimuth resolution, the shape of the scattering center is circular; the range resolution is not equal to the azimuth resolution, and the shape of the scattering center is elliptic. In order to obtain more accurate two-dimensional image, the appropriate range resolution and azimuth resolution can be considered when using the ideal point scattering model for two-dimensional imaging. The two-dimensional imaging results of the plate at different azimuth and angle can be used as a reference for the study of non-ideal point scattering model.","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"1 1","pages":"789-798"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Class-E Synchronous RF Rectifier: Circuit Formulation, Geodesic Trajectory, Time-Domain Simulation, and Prototype Experiment e类同步射频整流器:电路配方、测地线轨迹、时域仿真及原型实验
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2023mmp0004
Ryoya Honda, M. Mizutani, Masaya Tamura, T. Ohira
{"title":"Class-E Synchronous RF Rectifier: Circuit Formulation, Geodesic Trajectory, Time-Domain Simulation, and Prototype Experiment","authors":"Ryoya Honda, M. Mizutani, Masaya Tamura, T. Ohira","doi":"10.1587/transele.2023mmp0004","DOIUrl":"https://doi.org/10.1587/transele.2023mmp0004","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"1 1","pages":"698-706"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Encouraging Innovation in Analog IC Design 鼓励模拟集成电路设计创新
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022cti0001
C. Mangelsdorf
{"title":"Encouraging Innovation in Analog IC Design","authors":"C. Mangelsdorf","doi":"10.1587/transele.2022cti0001","DOIUrl":"https://doi.org/10.1587/transele.2022cti0001","url":null,"abstract":"SUMMARY Recent years have seen a decline in the art of analog IC de-sign even though analog interface and analog signal processing remain just as essential as ever. While there are many contributing factors, four specific pressures which contribute the most to the loss of creativity and innovation within analog practice are examined: process evolution, risk aversion, digitally assisted analog, and corporate culture. Despite the potency of these forces, none are found to be insurmountable obstacles to reinvigorating the industry. A more creative future is within our reach.","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"106 1","pages":"516-520"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67305500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An SOI-Based Lock-in Pixel with a Shallow Buried Channel for Reducing Parasitic Light Sensitivity and Improving Modulation Contrast 基于soi的浅埋通道锁相像素降低寄生光灵敏度和提高调制对比度
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022ctp0003
Tatsuya Kobayashi, K. Yasutomi, Naoki Takada, S. Kawahito
{"title":"An SOI-Based Lock-in Pixel with a Shallow Buried Channel for Reducing Parasitic Light Sensitivity and Improving Modulation Contrast","authors":"Tatsuya Kobayashi, K. Yasutomi, Naoki Takada, S. Kawahito","doi":"10.1587/transele.2022ctp0003","DOIUrl":"https://doi.org/10.1587/transele.2022ctp0003","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"106 1","pages":"538-545"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC 基于55nm CMOS DDC的0.6 v 41.3 ghz功率可扩展子采样锁相环
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022cts0001
Sangyeop Lee, K. Takano, S. Amakawa, T. Yoshida, M. Fujishima
{"title":"A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC","authors":"Sangyeop Lee, K. Takano, S. Amakawa, T. Yoshida, M. Fujishima","doi":"10.1587/transele.2022cts0001","DOIUrl":"https://doi.org/10.1587/transele.2022cts0001","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"106 1","pages":"533-537"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel Trench MOS Barrier Schottky Contact Super Barrier Rectifier 一种新型沟槽MOS势垒肖特基触点超级势垒整流器
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022ecp5059
Peijian Zhang, K. Zhu, Wensuo Chen
{"title":"A Novel Trench MOS Barrier Schottky Contact Super Barrier Rectifier","authors":"Peijian Zhang, K. Zhu, Wensuo Chen","doi":"10.1587/transele.2022ecp5059","DOIUrl":"https://doi.org/10.1587/transele.2022ecp5059","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"1 1","pages":""},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 58-%-Lock-Range Divide-by-9 Injection-Locked Frequency Divider Using Harmonic-Control Technique 采用谐波控制技术的58%锁程/ 9注入锁频分频器
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022cts0003
Sangyeop Lee, S. Amakawa, T. Yoshida, M. Fujishima
{"title":"A 58-%-Lock-Range Divide-by-9 Injection-Locked Frequency Divider Using Harmonic-Control Technique","authors":"Sangyeop Lee, S. Amakawa, T. Yoshida, M. Fujishima","doi":"10.1587/transele.2022cts0003","DOIUrl":"https://doi.org/10.1587/transele.2022cts0003","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"106 1","pages":"529-532"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Capacitive Wireless Power Transfer System with Misalignment Tolerance in Flowing Freshwater Environments 流动淡水环境中容差电容式无线输电系统
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2023ecp5018
Yasumasa Naka, Akihiko Ishiwata, Masaya Tamura
{"title":"Capacitive Wireless Power Transfer System with Misalignment Tolerance in Flowing Freshwater Environments","authors":"Yasumasa Naka, Akihiko Ishiwata, Masaya Tamura","doi":"10.1587/transele.2023ecp5018","DOIUrl":"https://doi.org/10.1587/transele.2023ecp5018","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"1 1","pages":""},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Simplified Method for Determining Mathematical Representation of Microwave Oscillator Load Characteristics 一种确定微波振荡器负载特性数学表示的简化方法
4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2023ecs6009
Katsumi FUKUMOTO
{"title":"A Simplified Method for Determining Mathematical Representation of Microwave Oscillator Load Characteristics","authors":"Katsumi FUKUMOTO","doi":"10.1587/transele.2023ecs6009","DOIUrl":"https://doi.org/10.1587/transele.2023ecs6009","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134980029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Fully Analog Deep Neural Network Inference Accelerator with Pipeline Registers Based on Master-Slave Switched Capacitors 基于主从切换电容的管道寄存器全模拟深度神经网络推理加速器
IF 0.5 4区 工程技术
IEICE Transactions on Electronics Pub Date : 2023-01-01 DOI: 10.1587/transele.2022ecp5049
Yaxin Mei, T. Ohsawa
{"title":"A Fully Analog Deep Neural Network Inference Accelerator with Pipeline Registers Based on Master-Slave Switched Capacitors","authors":"Yaxin Mei, T. Ohsawa","doi":"10.1587/transele.2022ecp5049","DOIUrl":"https://doi.org/10.1587/transele.2022ecp5049","url":null,"abstract":"","PeriodicalId":50384,"journal":{"name":"IEICE Transactions on Electronics","volume":"106 1","pages":"477-485"},"PeriodicalIF":0.5,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67306025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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