Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications最新文献

Biomedical intelligence security home network-ATM/IP CATV network 生物医学智能安全家庭网络- atm /IP CATV网络

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10046

R. Volner, L. Pousek

{"title":"Biomedical intelligence security home network-ATM/IP CATV network","authors":"R. Volner, L. Pousek","doi":"10.1109/DELTA.2004.10046","DOIUrl":"https://doi.org/10.1109/DELTA.2004.10046","url":null,"abstract":"The term security network intelligence is widely used in the field of communication security network. A number of new and potentially concepts and products based on the concept of security network intelligence have been introduced, including smart flows, intelligent routing, and intelligent web switching. Many intelligent systems focus on a specific security service, function, or device, and do not provide true end-to-end service network intelligence. True security network intelligence requires more than a set of disconnected elements, it requires an interconnecting and functionally coupled architecture that enables the various functional levels to interact and communicate with each other. The article describes information network and CATV applications, backbone network structure. Cable is a natural network for carrying high-capacity, bandwidth-intense information. In the age of analogue program signals, cable's capacity was a natural transmission media for broadcast colour TV and high-fidelity stereo sound programs. In the new digital program signal age, cable's high capacity is a natural network for carrying interactive computer-based, data-intensive multimedia programs.","PeriodicalId":444571,"journal":{"name":"Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121218838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Noise analysis of a reduced complexity pipeline analog-to-digital converter 一种低复杂度流水线模数转换器的噪声分析

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10059

H. Le, A. Zayegh, J. Singh

引用次数: 0

CMOS open fault detection by appearance time of switching supply current 利用开关电源电流出现时间检测CMOS断路故障

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10036

M. Hashizume, T. Akita, H. Yotsuyanagi, T. Tamesada

引用次数: 3

Frequency domain testing of general purpose processors at the instruction execution level 通用处理器指令执行层的频域测试

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10065

N. Venkateswaran, K. Bharath

引用次数: 5

Practical fault coverage of supply current tests for bipolar ICs 双极集成电路电源电流测试的实际故障覆盖

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10035

I. Tsukimoto, M. Hashizume, H. Yotsuyanagi, T. Tamesada

引用次数: 0

Measurement and analysis of physical defects for dynamic supply current testing 动态电源电流测试中物理缺陷的测量和分析

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10031

S. Thomas, R. Makki, Sai Kishore Vavilala

引用次数: 5

FPGA implementation of an OFDM-WLAN synchronizer OFDM-WLAN同步器的FPGA实现

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10039

K. Wang, J. Singh, M. Faulkner

{"title":"FPGA implementation of an OFDM-WLAN synchronizer","authors":"K. Wang, J. Singh, M. Faulkner","doi":"10.1109/DELTA.2004.10039","DOIUrl":"https://doi.org/10.1109/DELTA.2004.10039","url":null,"abstract":"In this paper, we present a timing and frequency synchronization scheme and its FPGA implementation for IEEE 802.11a WLAN systems. In the scheme, an efficient double auto-correlation method based on short training symbols is used for timing synchronization. The performance of the proposed method is comparable or even superior to that of the conventional timing synchronization method under multipath fading channels. By averaging the correlation over four short training symbols, the accuracy of frequency synchronization using short training symbols can be improved to a level that the fine frequency synchronization process using long training symbols in the conventional scheme would not be needed. Thus both timing and frequency synchronization can be achieved using short training symbols alone to reduce computational complexity and overhead. Furthermore, the hardware architecture of the proposed synchronization scheme is developed. The synchronizer is mainly made up of correlator, angle calculator and peak detector, which are implemented by an iterative process, a CORDIC circuit and a finite state machine, respectively. Such an architecture results in low implementation complexity and low computational latency.","PeriodicalId":444571,"journal":{"name":"Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133043549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 26

A power supply circuit recycling charge in adiabatic dynamic CMOS logic circuits 绝热动态CMOS逻辑电路中的电源电路回收电荷

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10022

Daisuke Ezaki, M. Hashizume, H. Yotsuyanagi, T. Tamesada

引用次数: 2

Crosstalk fault tolerant processor architecture-a power aware design 串扰容错处理器架构——一种功率感知设计

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10067

N. Venkateswaran, V. Kumar, R. Raghavan, R. Srinivas, S. Subramanian, V. Balaji, V. Mahalingam, T. Rajaprabhu

引用次数: 0

Integrated MicroPhotonic wideband RF interference mitigation filter 集成微光子宽带射频干扰抑制滤波器

Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications Pub Date : 2004-01-28 DOI: 10.1109/DELTA.2004.10029

K. Alameh, A. Bouzerdoum, Selam T. Ahderom, Mehrdad Raisi, K. Eshraghian, X. Zhao, R. Zheng, Zhenglin Wang

引用次数: 1