M. Hashizume, T. Akita, H. Yotsuyanagi, T. Tamesada
{"title":"CMOS open fault detection by appearance time of switching supply current","authors":"M. Hashizume, T. Akita, H. Yotsuyanagi, T. Tamesada","doi":"10.1109/DELTA.2004.10036","DOIUrl":null,"url":null,"abstract":"In this paper, a new dynamic supply current test method is proposed for detecting open defects on signal lines in CMOS logic circuits. The method is based on the appearance time of dynamic supply current that flows when a test input vector is provided to a circuit under test. Also, we introduce our designed sensor circuit of the appearance time. Feasibility of tests based on the test method is examined by some experiments. The experimental results show that open defects on signal lines in CMOS logic circuits will be detected by the test method.","PeriodicalId":444571,"journal":{"name":"Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DELTA.2004.10036","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this paper, a new dynamic supply current test method is proposed for detecting open defects on signal lines in CMOS logic circuits. The method is based on the appearance time of dynamic supply current that flows when a test input vector is provided to a circuit under test. Also, we introduce our designed sensor circuit of the appearance time. Feasibility of tests based on the test method is examined by some experiments. The experimental results show that open defects on signal lines in CMOS logic circuits will be detected by the test method.