2014 IEEE International Conference on Evolvable Systems最新文献_第2页

Multiobjective genetic algorithm for routability-driven circuit clustering on FPGAs fpga可达性驱动电路聚类的多目标遗传算法

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008729

Y. Wang, S. Bale, James Alfred Walker, M. Trefzer, A. Tyrrell

{"title":"Multiobjective genetic algorithm for routability-driven circuit clustering on FPGAs","authors":"Y. Wang, S. Bale, James Alfred Walker, M. Trefzer, A. Tyrrell","doi":"10.1109/ICES.2014.7008729","DOIUrl":"https://doi.org/10.1109/ICES.2014.7008729","url":null,"abstract":"This paper presents a novel routability-driven circuit clustering (packing) technique, DBPack, to improve function packing on FPGAs. We address a number of challenges when optimising packing of generic FPGA architectures, which are input bandwidth constraints (the number of unique cluster input signals is greater than the number of unique signals available from routing channel), density of packing to satisfy area constraints and minimisation of exposed nets outside the cluster in order to facilitate routability. In order to achieve optimal trade-off solutions when mapping for groups of Basic Logic Elements (BLEs) into clusters with regard to multiple objectives, we have developed a population based circuit clustering algorithm based on non-dominated sorting multi-objective genetic algorithm (NSGA-II). Our proposed method is tested using a number of the “Golden 20” MCNC benchmark circuits that are regularly used in FPGA-related literature. The results show that the techniques proposed in the paper considerably improve both packing density of clusters and their routability when compared to the state-of-art routability-driven packing algorithms, including VPack, T-VPack and RPack.","PeriodicalId":432958,"journal":{"name":"2014 IEEE International Conference on Evolvable Systems","volume":"304 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131925341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

How evolvable is novelty search? 新奇搜索是如何进化的?

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008731

D. Shorten, G. Nitschke

引用次数: 10

Improvements to Evolutionary Model Consistency Checking for a Flapping-Wing Micro Air Vehicle 扑翼微型飞行器演化模型一致性检验的改进

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008741

J. Gallagher, S. Boddhu, E. Matson, G. Greenwood

引用次数: 6

Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure 走向自适应缓存:一个运行时可重构的多核基础设施

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008719

Nam Ho, Paul Kaufmann, M. Platzner

引用次数: 2

Optimising ring oscillator frequency on a novel FPGA device via partial reconfiguration 通过部分重构优化新型FPGA器件上的环形振荡器频率

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008727

Pedro B. Campos, M. Trefzer, James Alfred Walker, S. Bale, A. Tyrrell

{"title":"Optimising ring oscillator frequency on a novel FPGA device via partial reconfiguration","authors":"Pedro B. Campos, M. Trefzer, James Alfred Walker, S. Bale, A. Tyrrell","doi":"10.1109/ICES.2014.7008727","DOIUrl":"https://doi.org/10.1109/ICES.2014.7008727","url":null,"abstract":"The random variations which are present at submicron technology nodes have been proven to have significant impact on both yield and device performance. The circuit-scale effects of transistor variability for a particular architecture are hard to estimate, and device manufacturers face the risk of functional failures due to these stochastic variations, which is a growing problem for the FPGA community and the circuit design community in general. The novel PAnDA architecture aims to tackle some of those effects by allowing post-fabrication reconfiguration of the fabric, which in turn makes it possible to both optimise performance of a singular chip and to reduce the impact that these adverse effects have on manufacturing yield. A series of 3 stage ring oscillator circuits are mapped onto the PAnDA fabric, and a Genetic Algorithm is used to find a configuration which minimises the difference in frequency between the oscillator outputs and a target. Combinations of transistor sizes are used to induce changes in the performance of the logic blocks. A configuration is found which reduces the difference in frequencies to less than 1.5%.","PeriodicalId":432958,"journal":{"name":"2014 IEEE International Conference on Evolvable Systems","volume":"287 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132007301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

In-situ evolution of an antenna array with hardware fault recovery 具有硬件故障恢复的天线阵的原位演化

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008724

J. Becker, J. Lohn, D. Linden

引用次数: 2

Evolution-in-materio: Solving bin packing problems using materials 材料进化:利用材料解决装箱问题

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008720

Maktuba Mohid, J. Miller, Simon Harding, G. Tufte, O. R. Lykkebø, M. K. Massey, M. Petty

{"title":"Evolution-in-materio: Solving bin packing problems using materials","authors":"Maktuba Mohid, J. Miller, Simon Harding, G. Tufte, O. R. Lykkebø, M. K. Massey, M. Petty","doi":"10.1109/ICES.2014.7008720","DOIUrl":"https://doi.org/10.1109/ICES.2014.7008720","url":null,"abstract":"Evolution-in-materio (EIM) is a form of intrinsic evolution in which evolutionary algorithms are allowed to manipulate physical variables that are applied to materials. This method aims to configure materials so that they solve computational problems without requiring a detailed understanding of the properties of the materials. The concept gained attention through the work of Adrian Thompson who in 1996 showed that evolution could be used to design circuits in FPGAS that exploited the physical properties of the underlying silicon [21]. In this paper, we show that using a purpose-built hardware platform called Mecobo, we can solve computational problems by evolving voltages, signals and the way they are applied to a microelectrode array with a chamber containing single-walled carbon nanotubes and a polymer. Here we demonstrate for the first time that this methodology can be applied to the well-known computational problem of bin packing. Results on benchmark problems show that the technique can obtain results reasonably close to the known global optima. This suggests that EIM is a promising method for configuring materials to carry out useful computation.","PeriodicalId":432958,"journal":{"name":"2014 IEEE International Conference on Evolvable Systems","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123775263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Towards compositional coevolution in evolutionary circuit design 论进化电路设计中的元件协同进化

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008735

Michaela Sikulová, Gergely Komjathy, L. Sekanina

引用次数: 5

Supervised learning of DPLL based winner-take-all neural network 基于DPLL的赢家通吃神经网络的监督学习

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008730

Masaki Azuma, H. Hikawa

{"title":"Supervised learning of DPLL based winner-take-all neural network","authors":"Masaki Azuma, H. Hikawa","doi":"10.1109/ICES.2014.7008730","DOIUrl":"https://doi.org/10.1109/ICES.2014.7008730","url":null,"abstract":"Neural networks are widely used in various fields due to their superior learning abilities. This paper proposes a hardware winner-take-all neural network (WTANN) that employs a new winner-take-all (WTA) circuit with phase-modulated pulse signals and digital phase-locked loops (DPLLs). The system uses DPLL as a computing element, so all input values are expressed by phases of rectangular signals. The proposed WTA circuit employs a simple winner search circuit. The proposed WTANN architecture is described by very high speed integrated circuit (VHSIC) Hardware Description Language (VHDL) and its feasibility was tested and verified through simulations. Conventional WTA takes a centralized winner search approach, in which vector distances are collected from all neurons and compared. In contrast, the winner search in the proposed system is carried out locally by a distributed winner search circuit among neurons. Therefore, no global communication channels with a wide bandwidth between the winner search module and each neuron are required. Furthermore, the proposed WTANN can easily extend the system scale, merely by increasing the number of neurons. Vector classifications with WTANN using two kinds of data sets, Iris and Wine, were carried out in VHDL simulations. The circuit size and speed were then evaluated by applying the VHDL description to a logic synthesis tool and experiments using FPGA. The results revealed that the proposed WTANN achieved valid learning.","PeriodicalId":432958,"journal":{"name":"2014 IEEE International Conference on Evolvable Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134265880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Evolution-in-materio: A frequency classifier using materials 材料进化:使用材料的频率分类器

2014 IEEE International Conference on Evolvable Systems Pub Date : 2014-12-01 DOI: 10.1109/ICES.2014.7008721

Maktuba Mohid, J. Miller, Simon Harding, G. Tufte, O. R. Lykkebø, M. K. Massey, M. Petty

引用次数: 18