2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing最新文献

{"title":"Escaping the Bonds of the Legacy: Step-Wise Migration to a Type-Safe Language in Safety-Critical Embedded Systems","authors":"Michael Stilkerich, J. Schedel, Peter Ulbrich, Wolfgang Schröder-Preikschat, D. Lohmann","doi":"10.1109/ISORC.2011.29","DOIUrl":"https://doi.org/10.1109/ISORC.2011.29","url":null,"abstract":"Type-safe high-level languages such as Java have not yet found their way into the domain of deeply embedded systems, even though numerous attempts have been made to make these languages cost attractive. One major challenge that remains is the huge existing code base in many industries. Completely reengineering this code base is not viable for cost and time reasons. We present an approach that allows to isolatedly combine legacy software components and safe software components in an embedded system using the two most common communication idioms found in this domain. Our approach allows the developer to freely choose between hardware- and software-based isolation mechanisms. We demonstrate the feasibility of our approach by porting a non-trivial part of a real-world, hard real-time embedded avionics application. Our results show that the cost of this mixed-mode operation is on the same scale as the pure operation.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127246440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multicore-Aware Code Positioning to Improve Worst-Case Performance","authors":"Yiqiang Ding, Wei Zhang","doi":"10.1109/ISORC.2011.35","DOIUrl":"https://doi.org/10.1109/ISORC.2011.35","url":null,"abstract":"Inter-thread interferences in shared caches can significantly affect the worst-case execution time (WCET) of real-time tasks running on multi-core chips. In this paper, we study three multicore-aware code positioning methods to reduce the inter-core L2 cache interferences between co-running real-time threads. One strategy focuses on decreasing the longest WCET among the co-running threads, and two other methods aim at achieving fairness in terms of the amount or percentage of WCET reduction among co-running threads. Our experiments indicate that the proposed multicore-aware code positioning approaches not only improve the worst-case performance of the real-time threads, but also make tradeoffs between efficiency and fairness for threads running on multi-core platforms.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125157209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Determining Actual Response Time in P-FRP Using Idle-Period Game Board","authors":"Chaitanya Belwal, A. Cheng","doi":"10.1109/ISORC.2011.26","DOIUrl":"https://doi.org/10.1109/ISORC.2011.26","url":null,"abstract":"A new, purely functional model of computation, called Priority-based Functional Reactive Programming (P-FRP), has been introduced as a new paradigm for building real-time software. P-FRP allows assignment of static priorities to tasks and guarantees that, when a higher priority task is released, the system will immediately preempt any lower-priority tasks that may be executing at the time. This execution model is different from the classical preemptive model of real-time systems due to the abort nature of preempted tasks. Methods developed for determining actual response time in the preemptive model are not guaranteed to work in P-FRP. In previous work, the gap-enumeration technique has been presented as a viable alternative to simulations for computing actual response time in P-FRP. Unfortunately, this method is difficult to implement due to its use of a Red-Black tree which is not available as a native function in programming languages. Also this method requires a complex logic loop for finding idle periods. In this paper, we present another technique using game-board which is simple to implement and uses native data structures. However, this simplicity comes at a performance cost which has also been analyzed in this paper.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129026275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Design of Middleware Support for Real-Time SOA","authors":"M. Panahi, Weiran Nie, Kwei-Jay Lin","doi":"10.1109/ISORC.2011.24","DOIUrl":"https://doi.org/10.1109/ISORC.2011.24","url":null,"abstract":"Service-oriented architectures (SOA) provide application systems the flexibility and cost-savings of dynamically composing workflows from reusable services. However, current SOA frameworks do not provide support for real-time workflow planning and execution. The goal of the RT-Llama SOA middleware framework is to address these new requirements. It works both at the service-level, by enhancing existing SOA middleware with service execution reservation capabilities, and at the end-to-end workflow-level, by creating a distributed component infrastructure for deadline-based workflow composition. This paper focuses on the design and implementation of the Virtual CPU (VCPU) resource scheduling scheme in RT-Llama to achieve predictable process executions. We have created a prototype implementation of RT-Llama using Sun Real-time JVM running on Solaris OS. Experiments consisting of real world service applications show that requests with end-to-end deadlines can be admitted and completed before deadlines with the VCPU scheme. We also show that service class differentiation can be achieved.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130146189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Roll-Forward Recovery with State Estimation","authors":"Vaclav Mikolasek, H. Kopetz","doi":"10.1109/ISORC.2011.40","DOIUrl":"https://doi.org/10.1109/ISORC.2011.40","url":null,"abstract":"We propose and analyze a novel roll-forward recovery scheme that is based on state estimation. In this solution, a dedicated monitoring component has the capability to predict future states of the physical environment by periodically analyzing the state of an associated monitored component. These predictions can serve either directly as restart states for a failed component or as facilitators of the recovery process. Our solution combines three key concepts: identification and handling of a component's ground state [1], resilience of service users to occasional but bounded service outage, and state estimation. The main benefit of the proposed scheme is that it avoids replication and thus provides responsive recovery for components that lack the property of replica-determinism. The aim of this work is recovery of time-critical but not safety-critical components in mixed-criticality real-time systems. We show that the proposed recovery scheme has comparable error-detection and repair efficiency to roll-forward recovery with behavior-based checks introduced by Xu and Randell [2].","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133948890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Refactoring Real-Time Java Profiles","authors":"Hans Søndergaard, Bent Thomsen, A. Ravn, René Rydhof Hansen, Thomas Bøgholm","doi":"10.1109/ISORC.2011.23","DOIUrl":"https://doi.org/10.1109/ISORC.2011.23","url":null,"abstract":"Just like other software, Java profiles benefits from refactoring when they have been used and have evolved for some time. This paper presents a refactoring of the Real-Time Specification for Java (RTSJ) and the Safety Critical Java (SCJ) profile (JSR-302). It highlights core concepts and makes it a suitable foundation for the proposed levels of SCJ. The ongoing work of specifying the SCJ profile builds on sub classing of RTSJ. This spurred our interest in a refactoring approach. It starts by extracting the common kernel of the specifications in a core package, which defines interfaces only. It is then possible to refactor SCJ with its three levels and RTSJ in such a way that each profile is in a separate package. This refactoring results in cleaner class hierarchies with no superfluous methods, well defined SCJ levels, elimination of SCJ annotations like @SCJAllowed, thus making the profiles easier to comprehend and use for application developers and students.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130697493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hardware-Assisted Reliability Enhancement for Embedded Multi-core Virtualization Design","authors":"Tsung-Han Lin, Y. Kinebuchi, Alexandre Courbot, H. Shimada, Takushi Morita, Hitoshi Mitake, Chen-Yi Lee, T. Nakajima","doi":"10.1109/ISORC.2011.37","DOIUrl":"https://doi.org/10.1109/ISORC.2011.37","url":null,"abstract":"In this paper, we propose a virtualization architecture for the multi-core embedded system to provide more system reliability and security while maintaining the same performance without introducing additional special hardware supports or having to implement complex protection mechanism in the virtualization layer. Virtualization has been widely used in embedded systems, especially in consumer electronics, albeit itself is not a new technique, because there are various needs for both GPOS (General Purpose Operating System) and RTOS (Real Time Operating System). The surge of the multi-core platform in the embedded system also helps the consolidation of the virtualization system for its better performance and lower power consumption. Embedded virtualization design usually uses two kinds of approaches. The first one is to use the traditional VMM, but it is too complicated for use in the embedded environment if there is no additional special hardware support. The other is the use of the micro kernel which imposes a modular design. The guest systems, however, would suffer from considerable amount of modifications because the micro kernel lets the guest systems to run in user space. For some RTOSes and theirs applications originally running in kernel space, it makes this approach more difficult to work because a lot of privileged instructions are used in those codes. To achieve better reliability and keep the virtualization layer design light weighted, a common hardware component adopted in the multi-core embedded processors is used in this work. In the most embedded platforms, vendors provide additional on-chip local memory for each physical core and these local memory areas are private only to their cores. By taking this memory architecture's advantage, we can mitigate above-mentioned problems at once. We choose to re-map the virtualization layer's program called SPUMONE, which it runs all its guest systems in kernel space, on the local memory. By doing so, it can provide additional reliability and security for the entire system because the SPUMONE's design in a multi-core platform has each instance being installed on a separated processor core which is different from the traditional virtualization layer design and the content of each SPUMONE is inaccessible to each others. We also achieve this goal without bringing any overhead to the overall performance.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127987040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Time-Predictable Object Cache","authors":"Martin Schoeberl","doi":"10.1109/ISORC.2011.22","DOIUrl":"https://doi.org/10.1109/ISORC.2011.22","url":null,"abstract":"Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is highly associative to track symbolic object addresses in the static analysis. Cache lines are organized to hold single objects and individual fields are loaded on a miss. This cache organization is statically analyzable and improves the performance. In this paper we present the design and implementation of the object cache in a uniprocessor and chip-multiprocessor version of the Java processor JOP.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116108789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hierarchical Composition of Parametric WCET in a Component Based Approach","authors":"Thomas Leveque, Etienne Borde, Amine Marref, Jan Carlson","doi":"10.1109/ISORC.2011.38","DOIUrl":"https://doi.org/10.1109/ISORC.2011.38","url":null,"abstract":"Worst Case Execution Time (WCET) computation is crucial to the overall timing analysis of real-time embedded systems. Facing the ever increasing complexity of such systems, techniques dedicated to WCET analysis can take advantage of Component Based Software Engineering (CBSE) by decomposing a difficult problem into smaller pieces, easier to analyse. To achieve this objective, the corresponding analysis results have to be composed to provide timing guarantees on the whole system. In this paper, we express the WCET of a component as a formula, allowing to represent its different computational modes. We then propose a Model Driven Engineering (MDE) approach that derives parametric WCET for composite components from parametric WCET of their subcomponents. This approach gives more accurate WCET estimates than naaive additive compositional analysis by taking into account usage context of components. However, analysis scalability concerns lead us to consider a trade-off between precision and scalability. This trade-off can be specified in the model. The composition of WCET estimations is automated and produces the parametric WCET expression of the composite component under analysis. This approach has been integrated in PRIDE.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125910582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Authentication in Time-Triggered Systems Using Time-Delayed Release of Keys","authors":"Armin Wasicek, C. E. Salloum, H. Kopetz","doi":"10.1109/ISORC.2011.14","DOIUrl":"https://doi.org/10.1109/ISORC.2011.14","url":null,"abstract":"This paper investigates on the security of time -- triggered transmission channels, which are used to establish a predictable and timely message transfer in a distributed embedded system with potential safety constraints. Within such a system, safety and security are closely related, because malicious attacks can have an impact on a system's safety and thereby cause severe damage. An attacker could masquerade as an original sender and try to alter some system parameters by injecting malicious messages in the system. In the embedded real-time systems domain particularly the authenticity of data items is of interest, because a lack of integrity can lead to incorrect or erroneous system behavior. In addition, we address the open research question how a common notion of time can contribute to a system's security. Our solution encompasses an authentication protocol to secure time-triggered transmission channels. We illustrate two attack scenarios (insertion and substitution) that aim at injecting fake messages in such a channel thereby corrupting the internal system state of a receiver. We discuss the feasibility of several key management strategies for embedded systems and describe an authentication protocol using time-delayed release of symmetric keys for time-triggered systems. In a case study we implement the protocol for a prototype Time-Triggered Ethernet (TTE) system. The insight gained from the evaluation is that the computation of the cryptographic algorithms consumes most resources. Our solution shows that authentication can be transparently applied to a time-triggered system exploiting the available global time base and without violating its timeliness properties.","PeriodicalId":431231,"journal":{"name":"2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130383584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}